Lines Matching defs:hw_desc
254 desc->hw_desc = kcalloc(num, sizeof(*desc->hw_desc), GFP_NOWAIT);
255 if (!desc->hw_desc) {
286 struct axi_dma_hw_desc *hw_desc;
290 hw_desc = &desc->hw_desc[descs_put];
291 dma_pool_free(chan->desc_pool, hw_desc->lli, hw_desc->llp);
294 kfree(desc->hw_desc);
331 len = vd_to_axi_desc(vdesc)->hw_desc[0].len;
424 write_chan_llp(chan, first->hw_desc[0].llp | lms);
587 static void set_desc_dest_master(struct axi_dma_hw_desc *hw_desc,
593 val = le32_to_cpu(hw_desc->lli->ctl_lo);
599 hw_desc->lli->ctl_lo = cpu_to_le32(val);
603 struct axi_dma_hw_desc *hw_desc,
652 hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);
653 if (unlikely(!hw_desc->lli))
665 hw_desc->lli->ctl_hi = cpu_to_le32(ctlhi);
668 write_desc_sar(hw_desc, mem_addr);
669 write_desc_dar(hw_desc, device_addr);
671 write_desc_sar(hw_desc, device_addr);
672 write_desc_dar(hw_desc, mem_addr);
675 hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
679 hw_desc->lli->ctl_lo = cpu_to_le32(ctllo);
681 set_desc_src_master(hw_desc);
683 hw_desc->len = len;
723 struct axi_dma_hw_desc *hw_desc = NULL;
757 hw_desc = &desc->hw_desc[i];
759 status = dw_axi_dma_set_hw_desc(chan, hw_desc, src_addr,
764 desc->length += hw_desc->len;
768 set_desc_last(hw_desc);
773 llp = desc->hw_desc[0].llp;
777 hw_desc = &desc->hw_desc[--total_segments];
778 write_desc_llp(hw_desc, llp | lms);
779 llp = hw_desc->llp;
800 struct axi_dma_hw_desc *hw_desc = NULL;
841 hw_desc = &desc->hw_desc[loop++];
842 status = dw_axi_dma_set_hw_desc(chan, hw_desc, mem, segment_len);
846 desc->length += hw_desc->len;
853 set_desc_last(&desc->hw_desc[num_sgs - 1]);
857 hw_desc = &desc->hw_desc[--num_sgs];
858 write_desc_llp(hw_desc, llp | lms);
859 llp = hw_desc->llp;
879 struct axi_dma_hw_desc *hw_desc = NULL;
901 hw_desc = &desc->hw_desc[num];
920 hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);
921 if (unlikely(!hw_desc->lli))
924 write_desc_sar(hw_desc, src_adr);
925 write_desc_dar(hw_desc, dst_adr);
926 hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);
937 hw_desc->lli->ctl_hi = cpu_to_le32(reg);
945 hw_desc->lli->ctl_lo = cpu_to_le32(reg);
947 set_desc_src_master(hw_desc);
948 set_desc_dest_master(hw_desc, desc);
950 hw_desc->len = xfer_len;
951 desc->length += hw_desc->len;
960 set_desc_last(&desc->hw_desc[num - 1]);
963 hw_desc = &desc->hw_desc[--num];
964 write_desc_llp(hw_desc, llp | lms);
965 llp = hw_desc->llp;
1011 axi_chan_dump_lli(chan, &desc_head->hw_desc[i]);
1051 struct axi_dma_hw_desc *hw_desc;
1078 hw_desc = &desc->hw_desc[i];
1079 if (hw_desc->llp == llp) {
1080 axi_chan_irq_clear(chan, hw_desc->lli->status_lo);
1081 hw_desc->lli->ctl_hi |= CH_CTL_H_LLI_VALID;
1084 if (((hw_desc->len * (i + 1)) % desc->period_len) == 0)