Lines Matching refs:jzdma
183 static inline u32 jz4780_dma_chn_readl(struct jz4780_dma_dev *jzdma,
186 return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn));
189 static inline void jz4780_dma_chn_writel(struct jz4780_dma_dev *jzdma,
192 writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn));
195 static inline u32 jz4780_dma_ctrl_readl(struct jz4780_dma_dev *jzdma,
198 return readl(jzdma->ctrl_base + reg);
201 static inline void jz4780_dma_ctrl_writel(struct jz4780_dma_dev *jzdma,
204 writel(val, jzdma->ctrl_base + reg);
207 static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
210 if (jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) {
213 if (jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC)
218 jz4780_dma_ctrl_writel(jzdma, reg, BIT(chn));
222 static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev *jzdma,
225 if ((jzdma->soc_data->flags & JZ_SOC_DATA_PER_CHAN_PM) &&
226 !(jzdma->soc_data->flags & JZ_SOC_DATA_NO_DCKES_DCKEC))
227 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKEC, BIT(chn));
274 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
286 else if (ord > jzdma->soc_data->transfer_ord_max)
287 ord = jzdma->soc_data->transfer_ord_max;
367 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
389 !(jzdma->soc_data->flags & JZ_SOC_DATA_BREAK_LINKS)) {
488 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
532 jz4780_dma_chan_enable(jzdma, jzchan->id);
535 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
538 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT,
547 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DTC,
553 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DDA, desc_phys);
554 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DDRS, BIT(jzchan->id));
557 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS,
577 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
584 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
590 jz4780_dma_chan_disable(jzdma, jzchan->id);
603 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
606 jz4780_dma_chan_disable(jzdma, jzchan->id);
627 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
635 count += jz4780_dma_chn_readl(jzdma, jzchan->id,
676 static bool jz4780_dma_chan_irq(struct jz4780_dma_dev *jzdma,
679 const unsigned int soc_flags = jzdma->soc_data->flags;
686 dcs = jz4780_dma_chn_readl(jzdma, jzchan->id, JZ_DMA_REG_DCS);
687 jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
718 jz4780_dma_chn_writel(jzdma, jzchan->id,
735 struct jz4780_dma_dev *jzdma = data;
736 unsigned int nb_channels = jzdma->soc_data->nb_channels;
741 pending = jz4780_dma_ctrl_readl(jzdma, JZ_DMA_REG_DIRQP);
744 if (jz4780_dma_chan_irq(jzdma, &jzdma->chan[i]))
749 dmac = jz4780_dma_ctrl_readl(jzdma, JZ_DMA_REG_DMAC);
751 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, dmac);
754 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DIRQP, pending);
788 struct jz4780_dma_dev *jzdma = jz4780_dma_chan_parent(jzchan);
795 } else if (jzdma->chan_reserved & BIT(jzchan->id)) {
808 struct jz4780_dma_dev *jzdma = ofdma->of_dma_data;
809 dma_cap_mask_t mask = jzdma->dma_device.cap_mask;
825 if (data.channel >= jzdma->soc_data->nb_channels) {
826 dev_err(jzdma->dma_device.dev,
833 if (!(jzdma->chan_reserved & BIT(data.channel))) {
834 dev_err(jzdma->dma_device.dev,
840 jzdma->chan[data.channel].transfer_type_tx = data.transfer_type_tx;
841 jzdma->chan[data.channel].transfer_type_rx = data.transfer_type_rx;
844 &jzdma->chan[data.channel].vchan.chan);
855 struct jz4780_dma_dev *jzdma;
870 jzdma = devm_kzalloc(dev, struct_size(jzdma, chan,
872 if (!jzdma)
875 jzdma->soc_data = soc_data;
876 platform_set_drvdata(pdev, jzdma);
878 jzdma->chn_base = devm_platform_ioremap_resource(pdev, 0);
879 if (IS_ERR(jzdma->chn_base))
880 return PTR_ERR(jzdma->chn_base);
884 jzdma->ctrl_base = devm_ioremap_resource(dev, res);
885 if (IS_ERR(jzdma->ctrl_base))
886 return PTR_ERR(jzdma->ctrl_base);
893 jzdma->ctrl_base = jzdma->chn_base + JZ4780_DMA_CTRL_OFFSET;
899 jzdma->clk = devm_clk_get(dev, NULL);
900 if (IS_ERR(jzdma->clk)) {
902 ret = PTR_ERR(jzdma->clk);
906 clk_prepare_enable(jzdma->clk);
910 0, &jzdma->chan_reserved);
912 dd = &jzdma->dma_device;
949 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMAC, JZ_DMA_DMAC_DMAE |
953 jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DMACP, 0);
958 jzchan = &jzdma->chan[i];
970 jz4780_dma_chan_enable(jzdma, 1);
971 jz4780_dma_chan_disable(jzdma, 1);
977 jzdma->irq = ret;
979 ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
980 jzdma);
982 dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
994 jzdma);
1004 free_irq(jzdma->irq, jzdma);
1007 clk_disable_unprepare(jzdma->clk);
1013 struct jz4780_dma_dev *jzdma = platform_get_drvdata(pdev);
1018 clk_disable_unprepare(jzdma->clk);
1019 free_irq(jzdma->irq, jzdma);
1021 for (i = 0; i < jzdma->soc_data->nb_channels; i++)
1022 tasklet_kill(&jzdma->chan[i].vchan.task);