Lines Matching defs:dma_dev
143 struct dma_device dma_dev;
1546 struct dma_device *dma_dev = &sba->dma_dev;
1549 sba->dma_chan.device = dma_dev;
1553 dma_cap_zero(dma_dev->cap_mask);
1554 dma_cap_set(DMA_INTERRUPT, dma_dev->cap_mask);
1555 dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
1556 dma_cap_set(DMA_XOR, dma_dev->cap_mask);
1557 dma_cap_set(DMA_PQ, dma_dev->cap_mask);
1564 dma_dev->dev = sba->mbox_dev;
1567 dma_dev->device_free_chan_resources = sba_free_chan_resources;
1568 dma_dev->device_terminate_all = sba_device_terminate_all;
1569 dma_dev->device_issue_pending = sba_issue_pending;
1570 dma_dev->device_tx_status = sba_tx_status;
1573 if (dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask))
1574 dma_dev->device_prep_dma_interrupt = sba_prep_dma_interrupt;
1577 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask))
1578 dma_dev->device_prep_dma_memcpy = sba_prep_dma_memcpy;
1581 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1582 dma_dev->device_prep_dma_xor = sba_prep_dma_xor;
1583 dma_dev->max_xor = sba->max_xor_srcs;
1587 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
1588 dma_dev->device_prep_dma_pq = sba_prep_dma_pq;
1589 dma_set_maxpq(dma_dev, sba->max_pq_srcs, 0);
1593 INIT_LIST_HEAD(&dma_dev->channels);
1594 list_add_tail(&sba->dma_chan.device_node, &dma_dev->channels);
1597 ret = dma_async_device_register(dma_dev);
1605 dma_has_cap(DMA_INTERRUPT, dma_dev->cap_mask) ? "interrupt " : "",
1606 dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask) ? "memcpy " : "",
1607 dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "xor " : "",
1608 dma_has_cap(DMA_PQ, dma_dev->cap_mask) ? "pq " : "");
1741 dma_async_device_unregister(&sba->dma_dev);