Lines Matching refs:atxdmac
310 static inline void __iomem *at_xdmac_chan_reg_base(struct at_xdmac *atxdmac, unsigned int chan_nb)
312 return atxdmac->regs + (atxdmac->layout->chan_cc_reg_base + chan_nb * 0x40);
315 #define at_xdmac_read(atxdmac, reg) readl_relaxed((atxdmac)->regs + (reg))
316 #define at_xdmac_write(atxdmac, reg, value) \
317 writel_relaxed((value), (atxdmac)->regs + (reg))
375 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
382 pm_runtime_mark_last_busy(atxdmac->dev);
383 pm_runtime_put_autosuspend(atxdmac->dev);
389 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
397 ret = pm_runtime_resume_and_get(atxdmac->dev);
407 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
410 ret = pm_runtime_resume_and_get(atxdmac->dev);
416 pm_runtime_mark_last_busy(atxdmac->dev);
417 pm_runtime_put_autosuspend(atxdmac->dev);
422 static void at_xdmac_off(struct at_xdmac *atxdmac, bool suspend_descriptors)
428 ret = pm_runtime_resume_and_get(atxdmac->dev);
432 at_xdmac_write(atxdmac, AT_XDMAC_GD, -1L);
435 while (at_xdmac_read(atxdmac, AT_XDMAC_GS))
438 at_xdmac_write(atxdmac, AT_XDMAC_GID, -1L);
441 if (!list_empty(&atxdmac->dma.channels) && suspend_descriptors) {
442 list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels,
449 pm_runtime_mark_last_busy(atxdmac->dev);
450 pm_runtime_put_autosuspend(atxdmac->dev);
457 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
461 ret = pm_runtime_resume_and_get(atxdmac->dev);
472 if (atxdmac->layout->sdif)
529 at_xdmac_write(atxdmac, AT_XDMAC_GIE, atchan->mask);
533 at_xdmac_write(atxdmac, AT_XDMAC_GE, atchan->mask);
568 struct at_xdmac *atxdmac = to_at_xdmac(chan->device);
571 desc = dma_pool_zalloc(atxdmac->at_xdmac_desc_pool, gfp_flags, &phys);
638 struct at_xdmac *atxdmac = of_dma->of_dma_data;
641 struct device *dev = atxdmac->dma.dev;
648 chan = dma_get_any_slave_channel(&atxdmac->dma);
668 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
680 if (atxdmac->layout->sdif)
705 if (atxdmac->layout->sdif)
1542 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1556 pm_status = pm_runtime_resume_and_get(atxdmac->dev);
1590 at_xdmac_write(atxdmac, atxdmac->layout->gswf, atchan->mask);
1648 at_xdmac_write(atxdmac, atxdmac->layout->gswf, atchan->mask);
1677 pm_runtime_mark_last_busy(atxdmac->dev);
1678 pm_runtime_put_autosuspend(atxdmac->dev);
1723 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1727 ret = pm_runtime_resume_and_get(atxdmac->dev);
1745 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
1746 while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
1759 pm_runtime_mark_last_busy(atxdmac->dev);
1760 pm_runtime_put_autosuspend(atxdmac->dev);
1768 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1823 pm_runtime_mark_last_busy(atxdmac->dev);
1824 pm_runtime_put_autosuspend(atxdmac->dev);
1829 struct at_xdmac *atxdmac = (struct at_xdmac *)dev_id;
1836 imr = at_xdmac_read(atxdmac, AT_XDMAC_GIM);
1837 status = at_xdmac_read(atxdmac, AT_XDMAC_GIS);
1840 dev_vdbg(atxdmac->dma.dev,
1848 for (i = 0; i < atxdmac->dma.chancnt; i++) {
1852 atchan = &atxdmac->chan[i];
1856 dev_vdbg(atxdmac->dma.dev,
1870 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
1911 static void at_xdmac_device_pause_set(struct at_xdmac *atxdmac,
1914 at_xdmac_write(atxdmac, atxdmac->layout->grws, atchan->mask);
1922 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1927 at_xdmac_device_pause_set(atxdmac, atchan);
1934 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1943 ret = pm_runtime_resume_and_get(atxdmac->dev);
1949 at_xdmac_device_pause_set(atxdmac, atchan);
1955 pm_runtime_mark_last_busy(atxdmac->dev);
1956 pm_runtime_put_autosuspend(atxdmac->dev);
1963 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1967 at_xdmac_write(atxdmac, atxdmac->layout->grwr, atchan->mask);
1975 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
1981 ret = pm_runtime_resume_and_get(atxdmac->dev);
1994 at_xdmac_write(atxdmac, atxdmac->layout->grwr, atchan->mask);
1999 pm_runtime_mark_last_busy(atxdmac->dev);
2000 pm_runtime_put_autosuspend(atxdmac->dev);
2009 struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device);
2015 ret = pm_runtime_resume_and_get(atxdmac->dev);
2020 at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
2021 while (at_xdmac_read(atxdmac, AT_XDMAC_GS) & atchan->mask)
2035 pm_runtime_put_autosuspend(atxdmac->dev);
2036 pm_runtime_mark_last_busy(atxdmac->dev);
2044 pm_runtime_mark_last_busy(atxdmac->dev);
2045 pm_runtime_put_autosuspend(atxdmac->dev);
2093 struct at_xdmac *atxdmac = to_at_xdmac(chan->device);
2099 dma_pool_free(atxdmac->at_xdmac_desc_pool, desc, desc->tx_dma_desc.phys);
2107 struct at_xdmac *atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
2111 if (!atxdmac->layout->axi_config)
2121 at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_M2M);
2122 at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_M2M);
2124 at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_P2M);
2125 at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_P2M);
2131 struct at_xdmac *atxdmac = dev_get_drvdata(dev);
2134 list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, device_node) {
2146 struct at_xdmac *atxdmac = dev_get_drvdata(dev);
2150 ret = pm_runtime_resume_and_get(atxdmac->dev);
2154 list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, device_node) {
2170 atxdmac->save_gim = at_xdmac_read(atxdmac, AT_XDMAC_GIM);
2171 atxdmac->save_gs = at_xdmac_read(atxdmac, AT_XDMAC_GS);
2173 at_xdmac_off(atxdmac, false);
2174 pm_runtime_mark_last_busy(atxdmac->dev);
2175 pm_runtime_put_noidle(atxdmac->dev);
2176 clk_disable_unprepare(atxdmac->clk);
2183 struct at_xdmac *atxdmac = dev_get_drvdata(dev);
2189 ret = clk_prepare_enable(atxdmac->clk);
2193 pm_runtime_get_noresume(atxdmac->dev);
2198 for (i = 0; i < atxdmac->dma.chancnt; i++) {
2199 atchan = &atxdmac->chan[i];
2204 at_xdmac_write(atxdmac, AT_XDMAC_GIE, atxdmac->save_gim);
2205 list_for_each_entry_safe(chan, _chan, &atxdmac->dma.channels, device_node) {
2227 at_xdmac_device_pause_set(atxdmac, atchan);
2233 if (atxdmac->save_gs & atchan->mask)
2234 at_xdmac_write(atxdmac, AT_XDMAC_GE, atchan->mask);
2238 pm_runtime_mark_last_busy(atxdmac->dev);
2239 pm_runtime_put_autosuspend(atxdmac->dev);
2246 struct at_xdmac *atxdmac = dev_get_drvdata(dev);
2248 clk_disable(atxdmac->clk);
2255 struct at_xdmac *atxdmac = dev_get_drvdata(dev);
2257 return clk_enable(atxdmac->clk);
2262 struct at_xdmac *atxdmac;
2277 * since atxdmac is not yet allocated and we need to know the number
2288 atxdmac = devm_kzalloc(&pdev->dev,
2289 struct_size(atxdmac, chan, nr_channels),
2291 if (!atxdmac) {
2296 atxdmac->regs = base;
2297 atxdmac->irq = irq;
2298 atxdmac->dev = &pdev->dev;
2300 atxdmac->layout = of_device_get_match_data(&pdev->dev);
2301 if (!atxdmac->layout)
2304 atxdmac->clk = devm_clk_get(&pdev->dev, "dma_clk");
2305 if (IS_ERR(atxdmac->clk)) {
2307 return PTR_ERR(atxdmac->clk);
2311 ret = request_irq(atxdmac->irq, at_xdmac_interrupt, 0, "at_xdmac", atxdmac);
2317 ret = clk_prepare_enable(atxdmac->clk);
2323 atxdmac->at_xdmac_desc_pool =
2326 if (!atxdmac->at_xdmac_desc_pool) {
2332 dma_cap_set(DMA_CYCLIC, atxdmac->dma.cap_mask);
2333 dma_cap_set(DMA_INTERLEAVE, atxdmac->dma.cap_mask);
2334 dma_cap_set(DMA_MEMCPY, atxdmac->dma.cap_mask);
2335 dma_cap_set(DMA_MEMSET, atxdmac->dma.cap_mask);
2336 dma_cap_set(DMA_MEMSET_SG, atxdmac->dma.cap_mask);
2337 dma_cap_set(DMA_SLAVE, atxdmac->dma.cap_mask);
2342 dma_cap_set(DMA_PRIVATE, atxdmac->dma.cap_mask);
2343 atxdmac->dma.dev = &pdev->dev;
2344 atxdmac->dma.device_alloc_chan_resources = at_xdmac_alloc_chan_resources;
2345 atxdmac->dma.device_free_chan_resources = at_xdmac_free_chan_resources;
2346 atxdmac->dma.device_tx_status = at_xdmac_tx_status;
2347 atxdmac->dma.device_issue_pending = at_xdmac_issue_pending;
2348 atxdmac->dma.device_prep_dma_cyclic = at_xdmac_prep_dma_cyclic;
2349 atxdmac->dma.device_prep_interleaved_dma = at_xdmac_prep_interleaved;
2350 atxdmac->dma.device_prep_dma_memcpy = at_xdmac_prep_dma_memcpy;
2351 atxdmac->dma.device_prep_dma_memset = at_xdmac_prep_dma_memset;
2352 atxdmac->dma.device_prep_dma_memset_sg = at_xdmac_prep_dma_memset_sg;
2353 atxdmac->dma.device_prep_slave_sg = at_xdmac_prep_slave_sg;
2354 atxdmac->dma.device_config = at_xdmac_device_config;
2355 atxdmac->dma.device_pause = at_xdmac_device_pause;
2356 atxdmac->dma.device_resume = at_xdmac_device_resume;
2357 atxdmac->dma.device_terminate_all = at_xdmac_device_terminate_all;
2358 atxdmac->dma.src_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
2359 atxdmac->dma.dst_addr_widths = AT_XDMAC_DMA_BUSWIDTHS;
2360 atxdmac->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
2361 atxdmac->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
2363 platform_set_drvdata(pdev, atxdmac);
2372 INIT_LIST_HEAD(&atxdmac->dma.channels);
2375 at_xdmac_off(atxdmac, true);
2378 struct at_xdmac_chan *atchan = &atxdmac->chan[i];
2380 atchan->chan.device = &atxdmac->dma;
2382 &atxdmac->dma.channels);
2384 atchan->ch_regs = at_xdmac_chan_reg_base(atxdmac, i);
2397 ret = dma_async_device_register(&atxdmac->dma);
2404 at_xdmac_xlate, atxdmac);
2411 nr_channels, atxdmac->regs);
2421 dma_async_device_unregister(&atxdmac->dma);
2428 clk_disable_unprepare(atxdmac->clk);
2430 free_irq(atxdmac->irq, atxdmac);
2436 struct at_xdmac *atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
2439 at_xdmac_off(atxdmac, true);
2441 dma_async_device_unregister(&atxdmac->dma);
2442 pm_runtime_disable(atxdmac->dev);
2445 clk_disable_unprepare(atxdmac->clk);
2447 free_irq(atxdmac->irq, atxdmac);
2449 for (i = 0; i < atxdmac->dma.chancnt; i++) {
2450 struct at_xdmac_chan *atchan = &atxdmac->chan[i];