Lines Matching refs:value
201 /* value that may get written back: */
608 * value read from CTRLA.
611 * @ctrla: the value of CTRLA
632 * the value of the channel's DSCR register and compare it against the DSCR
633 * value of each LLI.
659 * to the very same LLI as well as the CTRLA value read inbetween does. For
663 * reach. This algorithm is very unlikely not to find a stable value for DSCR.
686 * If the DSCR register value has not changed inside the DMA
695 * read value of CTRLA may refer to an already processed
1079 * @value: value to set memory buffer to
1084 atc_prep_dma_memset(struct dma_chan *chan, dma_addr_t dest, int value,
1096 &dest, value, len, flags);
1116 /* Only the first byte of value is to be used according to dmaengine */
1117 fill_pattern = (char)value;
1154 unsigned int sg_len, int value,
1168 value, sg_len, flags);
1182 *(u32*)vaddr = value;
1820 * We have to translate the value we get from the device tree since
1821 * the half FIFO configuration value had to be 0 to keep backward