Lines Matching refs:atchan
37 * atc_ / atchan : ATmel DMA Channel entity related
223 * @atchan: pointer to the atmel dma channel.
230 struct at_dma_chan *atchan;
289 #define channel_readl(atchan, name) \
290 __raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
292 #define channel_writel(atchan, name, val) \
293 __raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
382 static void vdbg_dump_regs(struct at_dma_chan *atchan)
384 struct at_dma *atdma = to_at_dma(atchan->vc.chan.device);
386 dev_err(chan2dev(&atchan->vc.chan),
388 atchan->vc.chan.chan_id,
392 dev_err(chan2dev(&atchan->vc.chan),
394 channel_readl(atchan, SADDR),
395 channel_readl(atchan, DADDR),
396 channel_readl(atchan, CTRLA),
397 channel_readl(atchan, CTRLB),
398 channel_readl(atchan, CFG),
399 channel_readl(atchan, DSCR));
402 static void vdbg_dump_regs(struct at_dma_chan *atchan) {}
405 static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli)
407 dev_crit(chan2dev(&atchan->vc.chan),
440 * @atchan: channel we want to test status
442 static inline int atc_chan_is_enabled(struct at_dma_chan *atchan)
444 struct at_dma *atdma = to_at_dma(atchan->vc.chan.device);
446 return !!(dma_readl(atdma, CHSR) & atchan->mask);
451 * @atchan: channel we want to test status
453 static inline int atc_chan_is_paused(struct at_dma_chan *atchan)
455 return test_bit(ATC_IS_PAUSED, &atchan->status);
460 * @atchan: channel we want to test status
462 static inline int atc_chan_is_cyclic(struct at_dma_chan *atchan)
464 return test_bit(ATC_IS_CYCLIC, &atchan->status);
548 * @atchan: the channel we want to start
550 static void atc_dostart(struct at_dma_chan *atchan)
552 struct virt_dma_desc *vd = vchan_next_desc(&atchan->vc);
556 atchan->desc = NULL;
560 vdbg_dump_regs(atchan);
563 atchan->desc = desc = to_atdma_desc(&vd->tx);
565 channel_writel(atchan, SADDR, 0);
566 channel_writel(atchan, DADDR, 0);
567 channel_writel(atchan, CTRLA, 0);
568 channel_writel(atchan, CTRLB, 0);
569 channel_writel(atchan, DSCR, desc->sg[0].lli_phys);
570 channel_writel(atchan, SPIP,
573 channel_writel(atchan, DPIP,
579 dma_writel(atchan->atdma, CHER, atchan->mask);
581 vdbg_dump_regs(atchan);
664 * @atchan: pointer to an atmel hdmac channel.
669 static int atc_get_llis_residue(struct at_dma_chan *atchan,
676 dscr = channel_readl(atchan, DSCR);
678 ctrla = channel_readl(atchan, CTRLA);
683 new_dscr = channel_readl(atchan, DSCR);
701 ctrla = channel_readl(atchan, CTRLA);
739 struct at_dma_chan *atchan = to_at_dma_chan(chan);
744 vd = vchan_find_desc(&atchan->vc, cookie);
747 else if (atchan->desc && atchan->desc->vd.tx.cookie == cookie)
748 desc = atchan->desc;
755 return atc_get_llis_residue(atchan, desc, residue);
759 ctrla = channel_readl(atchan, CTRLA);
766 * @atchan: channel where error occurs.
769 static void atc_handle_error(struct at_dma_chan *atchan, unsigned int i)
771 struct at_desc *desc = atchan->desc;
774 dma_writel(atchan->atdma, CHDR, AT_DMA_RES(i) | atchan->mask);
783 dev_crit(chan2dev(&atchan->vc.chan), "Bad descriptor submitted for DMA!\n");
784 dev_crit(chan2dev(&atchan->vc.chan), "cookie: %d\n",
787 atc_dump_lli(atchan, desc->sg[i].lli);
790 static void atdma_handle_chan_done(struct at_dma_chan *atchan, u32 pending,
795 spin_lock(&atchan->vc.lock);
796 desc = atchan->desc;
800 atc_handle_error(atchan, i);
804 if (atc_chan_is_cyclic(atchan)) {
808 atchan->desc = NULL;
809 if (!(atc_chan_is_enabled(atchan)))
810 atc_dostart(atchan);
813 spin_unlock(&atchan->vc.lock);
819 struct at_dma_chan *atchan;
837 atchan = &atdma->chan[i];
840 atdma_handle_chan_done(atchan, pending, i);
862 struct at_dma_chan *atchan = to_at_dma_chan(chan);
949 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
965 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1033 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
1087 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1142 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
1157 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1220 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
1244 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1246 struct dma_slave_config *sconfig = &atchan->dma_sconfig;
1284 FIELD_PREP(ATC_SIF, atchan->mem_if) |
1285 FIELD_PREP(ATC_DIF, atchan->per_if);
1332 FIELD_PREP(ATC_SIF, atchan->per_if) |
1333 FIELD_PREP(ATC_DIF, atchan->mem_if);
1382 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
1422 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1423 struct dma_slave_config *sconfig = &atchan->dma_sconfig;
1442 FIELD_PREP(ATC_SIF, atchan->mem_if) |
1443 FIELD_PREP(ATC_DIF, atchan->per_if);
1455 FIELD_PREP(ATC_SIF, atchan->per_if) |
1456 FIELD_PREP(ATC_DIF, atchan->mem_if);
1487 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1489 struct dma_slave_config *sconfig = &atchan->dma_sconfig;
1506 was_cyclic = test_and_set_bit(ATC_IS_CYCLIC, &atchan->status);
1540 return vchan_tx_prep(&atchan->vc, &desc->vd, flags);
1545 clear_bit(ATC_IS_CYCLIC, &atchan->status);
1552 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1560 memcpy(&atchan->dma_sconfig, sconfig, sizeof(*sconfig));
1562 convert_burst(&atchan->dma_sconfig.src_maxburst);
1563 convert_burst(&atchan->dma_sconfig.dst_maxburst);
1570 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1572 int chan_id = atchan->vc.chan.chan_id;
1577 spin_lock_irqsave(&atchan->vc.lock, flags);
1580 set_bit(ATC_IS_PAUSED, &atchan->status);
1582 spin_unlock_irqrestore(&atchan->vc.lock, flags);
1589 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1591 int chan_id = atchan->vc.chan.chan_id;
1596 if (!atc_chan_is_paused(atchan))
1599 spin_lock_irqsave(&atchan->vc.lock, flags);
1602 clear_bit(ATC_IS_PAUSED, &atchan->status);
1604 spin_unlock_irqrestore(&atchan->vc.lock, flags);
1611 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1613 int chan_id = atchan->vc.chan.chan_id;
1626 spin_lock_irqsave(&atchan->vc.lock, flags);
1629 dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask);
1632 while (dma_readl(atdma, CHSR) & atchan->mask)
1635 if (atchan->desc) {
1636 vchan_terminate_vdesc(&atchan->desc->vd);
1637 atchan->desc = NULL;
1640 vchan_get_all_descriptors(&atchan->vc, &list);
1642 clear_bit(ATC_IS_PAUSED, &atchan->status);
1644 clear_bit(ATC_IS_CYCLIC, &atchan->status);
1646 spin_unlock_irqrestore(&atchan->vc.lock, flags);
1648 vchan_dma_desc_free_list(&atchan->vc, &list);
1668 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1678 spin_lock_irqsave(&atchan->vc.lock, flags);
1681 spin_unlock_irqrestore(&atchan->vc.lock, flags);
1698 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1701 spin_lock_irqsave(&atchan->vc.lock, flags);
1702 if (vchan_issue_pending(&atchan->vc) && !atchan->desc) {
1703 if (!(atc_chan_is_enabled(atchan)))
1704 atc_dostart(atchan);
1706 spin_unlock_irqrestore(&atchan->vc.lock, flags);
1717 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1725 if (atc_chan_is_enabled(atchan)) {
1746 channel_writel(atchan, CFG, cfg);
1757 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1759 BUG_ON(atc_chan_is_enabled(atchan));
1762 atchan->status = 0;
1790 struct at_dma_chan *atchan;
1846 atchan = to_at_dma_chan(chan);
1847 atchan->per_if = dma_spec->args[0] & 0xff;
1848 atchan->mem_if = (dma_spec->args[0] >> 16) & 0xff;
2011 struct at_dma_chan *atchan = &atdma->chan[i];
2013 atchan->mem_if = AT_DMA_MEM_IF;
2014 atchan->per_if = AT_DMA_PER_IF;
2016 atchan->ch_regs = atdma->regs + ch_regs(i);
2017 atchan->mask = 1 << i;
2019 atchan->atdma = atdma;
2020 atchan->vc.desc_free = atdma_desc_free;
2021 vchan_init(&atchan->vc, &atdma->dma_device);
2144 struct at_dma_chan *atchan = to_at_dma_chan(chan);
2146 if (atc_chan_is_enabled(atchan) && !atc_chan_is_cyclic(atchan))
2152 static void atc_suspend_cyclic(struct at_dma_chan *atchan)
2154 struct dma_chan *chan = &atchan->vc.chan;
2158 if (!atc_chan_is_paused(atchan)) {
2166 atchan->save_dscr = channel_readl(atchan, DSCR);
2168 vdbg_dump_regs(atchan);
2179 struct at_dma_chan *atchan = to_at_dma_chan(chan);
2181 if (atc_chan_is_cyclic(atchan))
2182 atc_suspend_cyclic(atchan);
2183 atchan->save_cfg = channel_readl(atchan, CFG);
2193 static void atc_resume_cyclic(struct at_dma_chan *atchan)
2195 struct at_dma *atdma = to_at_dma(atchan->vc.chan.device);
2199 channel_writel(atchan, SADDR, 0);
2200 channel_writel(atchan, DADDR, 0);
2201 channel_writel(atchan, CTRLA, 0);
2202 channel_writel(atchan, CTRLB, 0);
2203 channel_writel(atchan, DSCR, atchan->save_dscr);
2204 dma_writel(atdma, CHER, atchan->mask);
2209 vdbg_dump_regs(atchan);
2229 struct at_dma_chan *atchan = to_at_dma_chan(chan);
2231 channel_writel(atchan, CFG, atchan->save_cfg);
2232 if (atc_chan_is_cyclic(atchan))
2233 atc_resume_cyclic(atchan);