Lines Matching defs:adchan
231 struct admac_chan *adchan = to_admac_chan(tx->chan);
235 spin_lock_irqsave(&adchan->lock, flags);
237 list_add_tail(&adtx->node, &adchan->submitted);
238 spin_unlock_irqrestore(&adchan->lock, flags);
255 struct admac_chan *adchan = container_of(chan, struct admac_chan, chan);
258 if (direction != admac_chan_direction(adchan->no))
375 struct admac_chan *adchan = to_admac_chan(chan);
376 struct admac_data *ad = adchan->host;
387 spin_lock_irqsave(&adchan->lock, flags);
388 adtx = adchan->current_tx;
392 residue = admac_cyclic_read_residue(ad, adchan->no, adtx);
396 list_for_each_entry(adtx, &adchan->issued, node) {
403 spin_unlock_irqrestore(&adchan->lock, flags);
409 static void admac_start_chan(struct admac_chan *adchan)
411 struct admac_data *ad = adchan->host;
412 u32 startbit = 1 << (adchan->no / 2);
415 ad->base + REG_CHAN_INTSTATUS(adchan->no, ad->irq_index));
417 ad->base + REG_CHAN_INTMASK(adchan->no, ad->irq_index));
419 switch (admac_chan_direction(adchan->no)) {
429 dev_dbg(adchan->host->dev, "ch%d start\n", adchan->no);
432 static void admac_stop_chan(struct admac_chan *adchan)
434 struct admac_data *ad = adchan->host;
435 u32 stopbit = 1 << (adchan->no / 2);
437 switch (admac_chan_direction(adchan->no)) {
447 dev_dbg(adchan->host->dev, "ch%d stop\n", adchan->no);
450 static void admac_reset_rings(struct admac_chan *adchan)
452 struct admac_data *ad = adchan->host;
455 ad->base + REG_CHAN_CTL(adchan->no));
456 writel_relaxed(0, ad->base + REG_CHAN_CTL(adchan->no));
459 static void admac_start_current_tx(struct admac_chan *adchan)
461 struct admac_data *ad = adchan->host;
462 int ch = adchan->no;
464 admac_reset_rings(adchan);
467 admac_cyclic_write_one_desc(ad, ch, adchan->current_tx);
468 admac_start_chan(adchan);
469 admac_cyclic_write_desc(ad, ch, adchan->current_tx);
474 struct admac_chan *adchan = to_admac_chan(chan);
478 spin_lock_irqsave(&adchan->lock, flags);
479 list_splice_tail_init(&adchan->submitted, &adchan->issued);
480 if (!list_empty(&adchan->issued) && !adchan->current_tx) {
481 tx = list_first_entry(&adchan->issued, struct admac_tx, node);
484 adchan->current_tx = tx;
485 adchan->nperiod_acks = 0;
486 admac_start_current_tx(adchan);
488 spin_unlock_irqrestore(&adchan->lock, flags);
493 struct admac_chan *adchan = to_admac_chan(chan);
495 admac_stop_chan(adchan);
502 struct admac_chan *adchan = to_admac_chan(chan);
504 admac_start_chan(adchan);
511 struct admac_chan *adchan = to_admac_chan(chan);
514 spin_lock_irqsave(&adchan->lock, flags);
515 admac_stop_chan(adchan);
516 admac_reset_rings(adchan);
518 if (adchan->current_tx) {
519 list_add_tail(&adchan->current_tx->node, &adchan->to_free);
520 adchan->current_tx = NULL;
526 list_splice_tail_init(&adchan->submitted, &adchan->to_free);
527 list_splice_tail_init(&adchan->issued, &adchan->to_free);
528 spin_unlock_irqrestore(&adchan->lock, flags);
535 struct admac_chan *adchan = to_admac_chan(chan);
540 spin_lock_irqsave(&adchan->lock, flags);
541 list_splice_tail_init(&adchan->to_free, &head);
542 spin_unlock_irqrestore(&adchan->lock, flags);
544 tasklet_kill(&adchan->tasklet);
554 struct admac_chan *adchan = to_admac_chan(chan);
555 struct admac_data *ad = adchan->host;
558 dma_cookie_init(&adchan->chan);
559 ret = admac_alloc_sram_carveout(ad, admac_chan_direction(adchan->no),
560 &adchan->carveout);
564 writel_relaxed(adchan->carveout,
565 ad->base + REG_CHAN_SRAM_CARVEOUT(adchan->no));
571 struct admac_chan *adchan = to_admac_chan(chan);
575 admac_free_sram_carveout(adchan->host, admac_chan_direction(adchan->no),
576 adchan->carveout);
645 struct admac_chan *adchan = &ad->channels[channo];
652 spin_lock_irqsave(&adchan->lock, flags);
655 if (adchan->current_tx) {
656 struct admac_tx *tx = adchan->current_tx;
658 adchan->nperiod_acks += nreports;
663 tasklet_schedule(&adchan->tasklet);
665 spin_unlock_irqrestore(&adchan->lock, flags);
715 struct admac_chan *adchan = from_tasklet(adchan, t, tasklet);
721 spin_lock_irq(&adchan->lock);
722 adtx = adchan->current_tx;
723 nacks = adchan->nperiod_acks;
724 adchan->nperiod_acks = 0;
725 spin_unlock_irq(&adchan->lock);
741 struct admac_chan *adchan = to_admac_chan(chan);
742 struct admac_data *ad = adchan->host;
743 bool is_tx = admac_chan_direction(adchan->no) == DMA_MEM_TO_DEV;
745 u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) &
785 writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no));
796 ad->base + REG_CHAN_FIFOCTL(adchan->no));
877 struct admac_chan *adchan = &ad->channels[i];
879 adchan->host = ad;
880 adchan->no = i;
881 adchan->chan.device = &ad->dma;
882 spin_lock_init(&adchan->lock);
883 INIT_LIST_HEAD(&adchan->submitted);
884 INIT_LIST_HEAD(&adchan->issued);
885 INIT_LIST_HEAD(&adchan->to_free);
886 list_add_tail(&adchan->chan.device_node, &dma->channels);
887 tasklet_setup(&adchan->tasklet, admac_chan_tasklet);