Lines Matching refs:plchan
333 static int pl08x_request_mux(struct pl08x_dma_chan *plchan)
335 const struct pl08x_platform_data *pd = plchan->host->pd;
338 if (plchan->mux_use++ == 0 && pd->get_xfer_signal) {
339 ret = pd->get_xfer_signal(plchan->cd);
341 plchan->mux_use = 0;
345 plchan->signal = ret;
350 static void pl08x_release_mux(struct pl08x_dma_chan *plchan)
352 const struct pl08x_platform_data *pd = plchan->host->pd;
354 if (plchan->signal >= 0) {
355 WARN_ON(plchan->mux_use == 0);
357 if (--plchan->mux_use == 0 && pd->put_xfer_signal) {
358 pd->put_xfer_signal(plchan->cd, plchan->signal);
359 plchan->signal = -1;
527 static void pl08x_start_next_txd(struct pl08x_dma_chan *plchan)
529 struct pl08x_driver_data *pl08x = plchan->host;
530 struct pl08x_phy_chan *phychan = plchan->phychan;
531 struct virt_dma_desc *vd = vchan_next_desc(&plchan->vc);
537 plchan->at = txd;
753 static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
755 struct pl08x_driver_data *pl08x = plchan->host;
764 ch = plchan->phychan;
765 txd = plchan->at;
859 static void pl08x_phy_alloc_and_start(struct pl08x_dma_chan *plchan)
861 struct pl08x_driver_data *pl08x = plchan->host;
864 ch = pl08x_get_phy_channel(pl08x, plchan);
866 dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name);
867 plchan->state = PL08X_CHAN_WAITING;
868 plchan->waiting_at = jiffies;
873 ch->id, plchan->name);
875 plchan->phychan = ch;
876 plchan->state = PL08X_CHAN_RUNNING;
877 pl08x_start_next_txd(plchan);
881 struct pl08x_dma_chan *plchan)
883 struct pl08x_driver_data *pl08x = plchan->host;
886 ch->id, plchan->name);
893 ch->serving = plchan;
894 plchan->phychan = ch;
895 plchan->state = PL08X_CHAN_RUNNING;
896 pl08x_start_next_txd(plchan);
903 static void pl08x_phy_free(struct pl08x_dma_chan *plchan)
905 struct pl08x_driver_data *pl08x = plchan->host;
934 pl08x_terminate_phy_chan(pl08x, plchan->phychan);
947 pl08x_phy_reassign_start(plchan->phychan, next);
955 pl08x_put_phy_channel(pl08x, plchan->phychan);
958 plchan->phychan = NULL;
959 plchan->state = PL08X_CHAN_IDLE;
1511 struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
1515 pl08x_release_mux(plchan);
1517 pl08x_free_txd(plchan->host, txd);
1521 struct pl08x_dma_chan *plchan)
1525 vchan_get_all_descriptors(&plchan->vc, &head);
1526 vchan_dma_desc_free_list(&plchan->vc, &head);
1546 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1561 if (plchan->state == PL08X_CHAN_PAUSED)
1566 spin_lock_irqsave(&plchan->vc.lock, flags);
1569 vd = vchan_find_desc(&plchan->vc, cookie);
1578 bytes = pl08x_getbytes_chan(plchan);
1581 spin_unlock_irqrestore(&plchan->vc.lock, flags);
1589 if (plchan->state == PL08X_CHAN_PAUSED && ret == DMA_IN_PROGRESS)
1700 static u32 pl08x_get_cctl(struct pl08x_dma_chan *plchan,
1717 if (plchan->cd->single)
1733 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1736 spin_lock_irqsave(&plchan->vc.lock, flags);
1737 if (vchan_issue_pending(&plchan->vc)) {
1738 if (!plchan->phychan && plchan->state != PL08X_CHAN_WAITING)
1739 pl08x_phy_alloc_and_start(plchan);
1741 spin_unlock_irqrestore(&plchan->vc.lock, flags);
1744 static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan)
1885 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1886 struct pl08x_driver_data *pl08x = plchan->host;
1891 txd = pl08x_get_txd(plchan);
1919 ret = pl08x_fill_llis_for_desc(plchan->host, txd);
1925 return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
1933 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1934 struct pl08x_driver_data *pl08x = plchan->host;
1941 txd = pl08x_get_txd(plchan);
1954 *slave_addr = plchan->cfg.dst_addr;
1955 addr_width = plchan->cfg.dst_addr_width;
1956 maxburst = plchan->cfg.dst_maxburst;
1958 dst_buses = plchan->cd->periph_buses;
1961 *slave_addr = plchan->cfg.src_addr;
1962 addr_width = plchan->cfg.src_addr_width;
1963 maxburst = plchan->cfg.src_maxburst;
1964 src_buses = plchan->cd->periph_buses;
1973 cctl |= pl08x_get_cctl(plchan, addr_width, maxburst);
1983 if (plchan->cfg.device_fc)
1994 ret = pl08x_request_mux(plchan);
1999 plchan->name);
2004 plchan->signal, plchan->name);
2008 txd->ccfg |= plchan->signal << PL080_CONFIG_DST_SEL_SHIFT;
2010 txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT;
2046 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2047 struct pl08x_driver_data *pl08x = plchan->host;
2054 __func__, sg_dma_len(sgl), plchan->name);
2065 pl08x_release_mux(plchan);
2073 ret = pl08x_fill_llis_for_desc(plchan->host, txd);
2075 pl08x_release_mux(plchan);
2080 return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
2088 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2089 struct pl08x_driver_data *pl08x = plchan->host;
2098 plchan->name);
2110 pl08x_release_mux(plchan);
2116 ret = pl08x_fill_llis_for_desc(plchan->host, txd);
2118 pl08x_release_mux(plchan);
2123 return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
2129 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2130 struct pl08x_driver_data *pl08x = plchan->host;
2132 if (!plchan->slave)
2147 plchan->cfg = *config;
2154 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2155 struct pl08x_driver_data *pl08x = plchan->host;
2158 spin_lock_irqsave(&plchan->vc.lock, flags);
2159 if (!plchan->phychan && !plchan->at) {
2160 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2164 plchan->state = PL08X_CHAN_IDLE;
2166 if (plchan->phychan) {
2171 pl08x_phy_free(plchan);
2174 if (plchan->at) {
2175 vchan_terminate_vdesc(&plchan->at->vd);
2176 plchan->at = NULL;
2179 pl08x_free_txd_list(pl08x, plchan);
2181 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2188 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2190 vchan_synchronize(&plchan->vc);
2195 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2202 spin_lock_irqsave(&plchan->vc.lock, flags);
2203 if (!plchan->phychan && !plchan->at) {
2204 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2208 pl08x_pause_phy_chan(plchan->phychan);
2209 plchan->state = PL08X_CHAN_PAUSED;
2211 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2218 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2225 spin_lock_irqsave(&plchan->vc.lock, flags);
2226 if (!plchan->phychan && !plchan->at) {
2227 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2231 pl08x_resume_phy_chan(plchan->phychan);
2232 plchan->state = PL08X_CHAN_RUNNING;
2234 spin_unlock_irqrestore(&plchan->vc.lock, flags);
2241 struct pl08x_dma_chan *plchan;
2248 plchan = to_pl08x_chan(chan);
2251 if (!strcmp(plchan->name, name))
2260 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
2262 return plchan->cd == chan_id;
2307 struct pl08x_dma_chan *plchan = phychan->serving;
2310 if (!plchan) {
2317 spin_lock(&plchan->vc.lock);
2318 tx = plchan->at;
2322 plchan->at = NULL;
2327 pl08x_release_mux(plchan);
2335 if (vchan_next_desc(&plchan->vc))
2336 pl08x_start_next_txd(plchan);
2338 pl08x_phy_free(plchan);
2340 spin_unlock(&plchan->vc.lock);
2536 struct pl08x_dma_chan *plchan;
2554 plchan = to_pl08x_chan(dma_chan);
2560 plchan->cd->periph_buses = dma_spec->args[1];