Lines Matching refs:cxlds
35 #define cxl_doorbell_busy(cxlds) \
36 (readl((cxlds)->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET) & \
55 static int cxl_pci_mbox_wait_for_doorbell(struct cxl_dev_state *cxlds)
60 while (cxl_doorbell_busy(cxlds)) {
65 if (!cxl_doorbell_busy(cxlds))
72 dev_dbg(cxlds->dev, "Doorbell wait took %dms",
89 struct cxl_dev_state *cxlds;
92 static int cxl_request_irq(struct cxl_dev_state *cxlds, int irq,
95 struct device *dev = cxlds->dev;
98 /* dev_id must be globally unique and must contain the cxlds */
102 dev_id->cxlds = cxlds;
109 static bool cxl_mbox_background_complete(struct cxl_dev_state *cxlds)
113 reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET);
122 struct cxl_dev_state *cxlds = dev_id->cxlds;
123 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlds);
125 if (!cxl_mbox_background_complete(cxlds))
128 reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_BG_CMD_STATUS_OFFSET);
150 struct cxl_dev_state *cxlds = &mds->cxlds;
153 if (cxl_mbox_background_complete(cxlds)) {
159 dev_dbg(cxlds->dev, "Sanitization operation ended\n");
194 struct cxl_dev_state *cxlds = &mds->cxlds;
195 void __iomem *payload = cxlds->regs.mbox + CXLDEV_MBOX_PAYLOAD_OFFSET;
196 struct device *dev = cxlds->dev;
221 if (cxl_doorbell_busy(cxlds)) {
223 readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);
225 cxl_cmd_err(cxlds->dev, mbox_cmd, md_status,
252 writeq(cmd_reg, cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET);
257 cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET);
260 rc = cxl_pci_mbox_wait_for_doorbell(cxlds);
262 u64 md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);
264 cxl_cmd_err(cxlds->dev, mbox_cmd, md_status, "mailbox timeout");
269 status_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_STATUS_OFFSET);
315 cxl_mbox_background_complete(cxlds),
321 if (!cxl_mbox_background_complete(cxlds)) {
327 bg_status_reg = readq(cxlds->regs.mbox +
345 cmd_reg = readq(cxlds->regs.mbox + CXLDEV_MBOX_CMD_OFFSET);
383 struct cxl_dev_state *cxlds = &mds->cxlds;
384 const int cap = readl(cxlds->regs.mbox + CXLDEV_MBOX_CAPS_OFFSET);
385 struct device *dev = cxlds->dev;
393 md_status = readq(cxlds->regs.memdev + CXLMDEV_STATUS_OFFSET);
411 if (cxl_pci_mbox_wait_for_doorbell(cxlds) != 0) {
444 irq = pci_irq_vector(to_pci_dev(cxlds->dev), msgnum);
448 if (cxl_request_irq(cxlds, irq, NULL, cxl_pci_mbox_irq))
451 dev_dbg(cxlds->dev, "Mailbox interrupts enabled\n");
453 ctrl = readl(cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET);
455 writel(ctrl, cxlds->regs.mbox + CXLDEV_MBOX_CTRL_OFFSET);
522 struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
528 if (!cxlds->regs.ras) {
542 addr = cxlds->regs.ras + CXL_RAS_UNCORRECTABLE_MASK_OFFSET;
555 addr = cxlds->regs.ras + CXL_RAS_CORRECTABLE_MASK_OFFSET;
584 return devm_add_action_or_reset(mds->cxlds.dev, free_event_buf, buf);
612 struct cxl_dev_state *cxlds = dev_id->cxlds;
613 struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlds);
621 status = readl(cxlds->regs.status + CXLDEV_DEV_EVENT_STATUS_OFFSET);
633 static int cxl_event_req_irq(struct cxl_dev_state *cxlds, u8 setting)
635 struct pci_dev *pdev = to_pci_dev(cxlds->dev);
646 return cxl_request_irq(cxlds, irq, NULL, cxl_event_thread);
661 dev_err(mds->cxlds.dev,
688 dev_err(mds->cxlds.dev, "Failed to set event interrupt policy : %d",
699 struct cxl_dev_state *cxlds = &mds->cxlds;
707 rc = cxl_event_req_irq(cxlds, policy.info_settings);
709 dev_err(cxlds->dev, "Failed to get interrupt for event Info log\n");
713 rc = cxl_event_req_irq(cxlds, policy.warn_settings);
715 dev_err(cxlds->dev, "Failed to get interrupt for event Warn log\n");
719 rc = cxl_event_req_irq(cxlds, policy.failure_settings);
721 dev_err(cxlds->dev, "Failed to get interrupt for event Failure log\n");
725 rc = cxl_event_req_irq(cxlds, policy.fatal_settings);
727 dev_err(cxlds->dev, "Failed to get interrupt for event Fatal log\n");
766 dev_err(mds->cxlds.dev,
784 struct cxl_dev_state *cxlds;
804 cxlds = &mds->cxlds;
805 pci_set_drvdata(pdev, cxlds);
807 cxlds->rcd = is_cxl_restricted(pdev);
808 cxlds->serial = pci_get_dsn(pdev);
809 cxlds->cxl_dvsec = pci_find_dvsec_capability(
811 if (!cxlds->cxl_dvsec)
819 rc = cxl_map_device_regs(&map, &cxlds->regs.device_regs);
827 cxlds->component_reg_phys = CXL_RESOURCE_NONE;
834 cxlds->component_reg_phys = map.resource;
836 rc = cxl_map_component_regs(&map, &cxlds->regs.component,
841 rc = cxl_await_media_ready(cxlds);
843 cxlds->media_ready = true;
875 cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds);
903 rc = devm_cxl_pmu_add(cxlds->dev, &pmu_regs, cxlmd->id, i, CXL_PMU_MEMDEV);
932 struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
933 struct cxl_memdev *cxlmd = cxlds->cxlmd;
946 struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
947 struct cxl_memdev *cxlmd = cxlds->cxlmd;