Lines Matching defs:hcu_dev
164 * @hcu_dev: OCS HCU device to wait for.
169 static int ocs_hcu_wait_busy(struct ocs_hcu_dev *hcu_dev)
173 return readl_poll_timeout(hcu_dev->io_base + OCS_HCU_STATUS, val,
179 static void ocs_hcu_done_irq_en(struct ocs_hcu_dev *hcu_dev)
182 writel(0xFFFFFFFF, hcu_dev->io_base + OCS_HCU_ISR);
183 hcu_dev->irq_err = false;
186 hcu_dev->io_base + OCS_HCU_IER);
189 static void ocs_hcu_dma_irq_en(struct ocs_hcu_dev *hcu_dev)
192 writel(0xFFFFFFFF, hcu_dev->io_base + OCS_HCU_DMA_MSI_ISR);
193 hcu_dev->irq_err = false;
196 hcu_dev->io_base + OCS_HCU_DMA_MSI_IER);
198 writel(HCU_DMA_MSI_UNMASK, hcu_dev->io_base + OCS_HCU_DMA_MSI_MASK);
201 static void ocs_hcu_irq_dis(struct ocs_hcu_dev *hcu_dev)
203 writel(HCU_IRQ_DISABLE, hcu_dev->io_base + OCS_HCU_IER);
204 writel(HCU_DMA_MSI_DISABLE, hcu_dev->io_base + OCS_HCU_DMA_MSI_IER);
207 static int ocs_hcu_wait_and_disable_irq(struct ocs_hcu_dev *hcu_dev)
211 rc = wait_for_completion_interruptible(&hcu_dev->irq_done);
215 if (hcu_dev->irq_err) {
217 hcu_dev->irq_err = false;
223 ocs_hcu_irq_dis(hcu_dev);
230 * @hcu_dev: The target HCU device.
243 static int ocs_hcu_get_intermediate_data(struct ocs_hcu_dev *hcu_dev,
259 rc = ocs_hcu_wait_busy(hcu_dev);
270 chain[i] = readl(hcu_dev->io_base + OCS_HCU_CHAIN);
272 data->msg_len_lo = readl(hcu_dev->io_base + OCS_HCU_MSG_LEN_LO);
273 data->msg_len_hi = readl(hcu_dev->io_base + OCS_HCU_MSG_LEN_HI);
280 * @hcu_dev: The target HCU device.
286 static void ocs_hcu_set_intermediate_data(struct ocs_hcu_dev *hcu_dev,
301 writel(chain[i], hcu_dev->io_base + OCS_HCU_CHAIN);
303 writel(data->msg_len_lo, hcu_dev->io_base + OCS_HCU_MSG_LEN_LO);
304 writel(data->msg_len_hi, hcu_dev->io_base + OCS_HCU_MSG_LEN_HI);
307 static int ocs_hcu_get_digest(struct ocs_hcu_dev *hcu_dev,
322 rc = ocs_hcu_wait_busy(hcu_dev);
328 chain[i] = readl(hcu_dev->io_base + OCS_HCU_CHAIN);
335 * @hcu_dev: The HCU device to configure.
341 static int ocs_hcu_hw_cfg(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
352 rc = ocs_hcu_wait_busy(hcu_dev);
357 ocs_hcu_irq_dis(hcu_dev);
365 writel(cfg, hcu_dev->io_base + OCS_HCU_MODE);
372 * @hcu_dev: The OCS HCU device whose key registers should be cleared.
374 static void ocs_hcu_clear_key(struct ocs_hcu_dev *hcu_dev)
380 writel(0, hcu_dev->io_base + OCS_HCU_KEY_0 + reg_off);
385 * @hcu_dev: The OCS HCU device the key should be written to.
391 static int ocs_hcu_write_key(struct ocs_hcu_dev *hcu_dev, const u8 *key, size_t len)
419 hcu_dev->io_base + OCS_HCU_KEY_BYTE_ORDER_CFG);
426 hcu_dev->io_base + OCS_HCU_KEY_0 + (sizeof(u32) * i));
435 * @hcu_dev: The OCS HCU device to use.
443 static int ocs_hcu_ll_dma_start(struct ocs_hcu_dev *hcu_dev,
466 ocs_hcu_done_irq_en(hcu_dev);
468 ocs_hcu_dma_irq_en(hcu_dev);
470 reinit_completion(&hcu_dev->irq_done);
471 writel(dma_list->dma_addr, hcu_dev->io_base + OCS_HCU_DMA_NEXT_SRC_DESCR);
472 writel(0, hcu_dev->io_base + OCS_HCU_DMA_SRC_SIZE);
473 writel(0, hcu_dev->io_base + OCS_HCU_DMA_DST_SIZE);
475 writel(OCS_HCU_START, hcu_dev->io_base + OCS_HCU_OPERATION);
477 writel(cfg, hcu_dev->io_base + OCS_HCU_DMA_DMA_MODE);
480 writel(OCS_HCU_TERMINATE, hcu_dev->io_base + OCS_HCU_OPERATION);
482 rc = ocs_hcu_wait_and_disable_irq(hcu_dev);
489 struct ocs_hcu_dma_list *ocs_hcu_dma_list_alloc(struct ocs_hcu_dev *hcu_dev,
499 dma_list->head = dma_alloc_coherent(hcu_dev->dev,
512 void ocs_hcu_dma_list_free(struct ocs_hcu_dev *hcu_dev,
518 dma_free_coherent(hcu_dev->dev,
526 int ocs_hcu_dma_list_add_tail(struct ocs_hcu_dev *hcu_dev,
530 struct device *dev = hcu_dev->dev;
601 * @hcu_dev: The OCS HCU device to use.
607 int ocs_hcu_hash_update(struct ocs_hcu_dev *hcu_dev,
613 if (!hcu_dev || !ctx)
617 rc = ocs_hcu_hw_cfg(hcu_dev, ctx->algo, false);
623 ocs_hcu_set_intermediate_data(hcu_dev, &ctx->idata, ctx->algo);
626 rc = ocs_hcu_ll_dma_start(hcu_dev, dma_list, false);
631 return ocs_hcu_get_intermediate_data(hcu_dev, &ctx->idata, ctx->algo);
636 * @hcu_dev: The OCS HCU device to use.
644 int ocs_hcu_hash_finup(struct ocs_hcu_dev *hcu_dev,
651 if (!hcu_dev || !ctx)
655 rc = ocs_hcu_hw_cfg(hcu_dev, ctx->algo, false);
661 ocs_hcu_set_intermediate_data(hcu_dev, &ctx->idata, ctx->algo);
664 rc = ocs_hcu_ll_dma_start(hcu_dev, dma_list, true);
669 return ocs_hcu_get_digest(hcu_dev, ctx->algo, dgst, dgst_len);
674 * @hcu_dev: The OCS HCU device to use.
681 int ocs_hcu_hash_final(struct ocs_hcu_dev *hcu_dev,
687 if (!hcu_dev || !ctx)
691 rc = ocs_hcu_hw_cfg(hcu_dev, ctx->algo, false);
697 ocs_hcu_set_intermediate_data(hcu_dev, &ctx->idata, ctx->algo);
703 ocs_hcu_done_irq_en(hcu_dev);
704 reinit_completion(&hcu_dev->irq_done);
705 writel(OCS_HCU_TERMINATE, hcu_dev->io_base + OCS_HCU_OPERATION);
707 rc = ocs_hcu_wait_and_disable_irq(hcu_dev);
712 return ocs_hcu_get_digest(hcu_dev, ctx->algo, dgst, dgst_len);
717 * @hcu_dev: The OCS HCU device to use.
726 int ocs_hcu_digest(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
729 struct device *dev = hcu_dev->dev;
735 rc = ocs_hcu_hw_cfg(hcu_dev, algo, false);
745 ocs_hcu_done_irq_en(hcu_dev);
747 reinit_completion(&hcu_dev->irq_done);
749 writel(dma_handle, hcu_dev->io_base + OCS_HCU_DMA_SRC_ADDR);
750 writel(data_len, hcu_dev->io_base + OCS_HCU_DMA_SRC_SIZE);
751 writel(OCS_HCU_START, hcu_dev->io_base + OCS_HCU_OPERATION);
752 writel(reg, hcu_dev->io_base + OCS_HCU_DMA_DMA_MODE);
754 writel(OCS_HCU_TERMINATE, hcu_dev->io_base + OCS_HCU_OPERATION);
756 rc = ocs_hcu_wait_and_disable_irq(hcu_dev);
762 return ocs_hcu_get_digest(hcu_dev, algo, dgst, dgst_len);
767 * @hcu_dev: The OCS HCU device to use.
777 int ocs_hcu_hmac(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
789 rc = ocs_hcu_hw_cfg(hcu_dev, algo, true);
793 rc = ocs_hcu_write_key(hcu_dev, key, key_len);
797 rc = ocs_hcu_ll_dma_start(hcu_dev, dma_list, true);
800 ocs_hcu_clear_key(hcu_dev);
805 return ocs_hcu_get_digest(hcu_dev, algo, dgst, dgst_len);
810 struct ocs_hcu_dev *hcu_dev = dev_id;
815 hcu_irq = readl(hcu_dev->io_base + OCS_HCU_ISR);
816 writel(hcu_irq, hcu_dev->io_base + OCS_HCU_ISR);
819 dma_irq = readl(hcu_dev->io_base + OCS_HCU_DMA_MSI_ISR);
820 writel(dma_irq, hcu_dev->io_base + OCS_HCU_DMA_MSI_ISR);
824 hcu_dev->irq_err = true;
835 complete(&hcu_dev->irq_done);