Lines Matching refs:CC_REG
55 CC_REG(PERIPHERAL_ID_0), CC_REG(PERIPHERAL_ID_1),
56 CC_REG(PERIPHERAL_ID_2), CC_REG(PERIPHERAL_ID_4)
60 CC_REG(COMPONENT_ID_0), CC_REG(COMPONENT_ID_1),
61 CC_REG(COMPONENT_ID_2), CC_REG(COMPONENT_ID_3)
109 cache_params = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS));
135 ace_const = cc_ioread(drvdata, CC_REG(AXIM_ACE_CONST));
194 irr = cc_ioread(drvdata, CC_REG(HOST_IRR));
200 imr = cc_ioread(drvdata, CC_REG(HOST_IMR));
203 cc_iowrite(drvdata, CC_REG(HOST_ICR), irr);
211 cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask);
221 cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | CC_GPR0_IRQ_MASK);
231 axi_err = cc_ioread(drvdata, CC_REG(AXIM_MON_ERR));
260 val = cc_ioread(drvdata, CC_REG(NVM_IS_IDLE));
280 val = cc_ioread(drvdata, CC_REG(AXIM_CFG));
281 cc_iowrite(drvdata, CC_REG(AXIM_CFG), val & ~CC_AXI_IRQ_MASK);
283 cc_ioread(drvdata, CC_REG(AXIM_CFG)));
287 val = cc_ioread(drvdata, CC_REG(HOST_IRR));
289 cc_iowrite(drvdata, CC_REG(HOST_ICR), val);
297 cc_iowrite(drvdata, CC_REG(HOST_IMR), ~val);
299 cc_iowrite(drvdata, CC_REG(AXIM_CACHE_PARAMS), drvdata->cache_params);
301 cc_iowrite(drvdata, CC_REG(AXIM_ACE_CONST), drvdata->ace_const);
329 new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP);
330 new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_712);
331 new_drvdata->ver_offset = CC_REG(HOST_VERSION_712);
333 new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP8);
334 new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_630);
335 new_drvdata->ver_offset = CC_REG(HOST_VERSION_630);
436 val = cc_ioread(new_drvdata, CC_REG(HOST_REMOVE_INPUT_PINS));
454 val = cc_ioread(new_drvdata, CC_REG(SECURITY_DISABLED));
580 cc_iowrite(drvdata, CC_REG(HOST_IMR), 0xFFFFFFFF);