Lines Matching refs:value
22 emu_ae.value = 0;
26 emu_se.value = 0;
31 nitrox_write_csr(ndev, EMU_AE_ENABLEX(i), emu_ae.value);
32 nitrox_write_csr(ndev, EMU_SE_ENABLEX(i), emu_se.value);
51 emu_ge_int.value = 0;
54 emu_wd_int.value = 0;
59 nitrox_write_csr(ndev, offset, emu_wd_int.value);
61 nitrox_write_csr(ndev, offset, emu_ge_int.value);
74 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
76 nitrox_write_csr(ndev, offset, pkt_in_ctl.value);
81 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
89 pkt_in_cnts.value = nitrox_read_csr(ndev, offset);
90 nitrox_write_csr(ndev, offset, pkt_in_cnts.value);
102 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
105 nitrox_write_csr(ndev, offset, pkt_in_ctl.value);
109 pkt_in_ctl.value = nitrox_read_csr(ndev, offset);
142 pkt_in_rsize.value = 0;
144 nitrox_write_csr(ndev, offset, pkt_in_rsize.value);
152 pkt_in_dbell.value = 0;
154 nitrox_write_csr(ndev, offset, pkt_in_dbell.value);
170 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
172 nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);
178 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
186 pkt_slc_cnts.value = nitrox_read_csr(ndev, offset);
187 nitrox_write_csr(ndev, offset, pkt_slc_cnts.value);
198 pkt_slc_ctl.value = 0;
207 nitrox_write_csr(ndev, offset, pkt_slc_ctl.value);
211 pkt_slc_ctl.value = nitrox_read_csr(ndev, offset);
227 pkt_slc_int.value = 0;
230 nitrox_write_csr(ndev, offset, pkt_slc_int.value);
255 core_int.value = 0;
261 nitrox_write_csr(ndev, NPS_CORE_INT_ENA_W1S, core_int.value);
272 core_gbl_vfcfg.value = 0;
275 nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, core_gbl_vfcfg.value);
319 aqmq_en_reg.value = 0;
321 nitrox_write_csr(ndev, offset, aqmq_en_reg.value);
327 activity_stat.value = nitrox_read_csr(ndev, offset);
335 cmp_cnt.value = nitrox_read_csr(ndev, offset);
336 nitrox_write_csr(ndev, offset, cmp_cnt.value);
346 aqmq_en_reg.value = 0;
348 nitrox_write_csr(ndev, offset, aqmq_en_reg.value);
368 drbl.value = 0;
370 nitrox_write_csr(ndev, offset, drbl.value);
384 qsize.value = 0;
386 nitrox_write_csr(ndev, offset, qsize.value);
390 cmp_thr.value = 0;
392 nitrox_write_csr(ndev, offset, cmp_thr.value);
427 pom_int.value = 0;
429 nitrox_write_csr(ndev, POM_INT_ENA_W1S, pom_int.value);
446 efl_rnm_ctl.value = nitrox_read_csr(ndev, offset);
449 nitrox_write_csr(ndev, offset, efl_rnm_ctl.value);
462 efl_core_int.value = 0;
466 nitrox_write_csr(ndev, offset, efl_core_int.value);
483 bmi_ctl.value = nitrox_read_csr(ndev, offset);
487 nitrox_write_csr(ndev, offset, bmi_ctl.value);
491 bmi_int_ena.value = 0;
495 nitrox_write_csr(ndev, offset, bmi_int_ena.value);
505 bmo_ctl2.value = nitrox_read_csr(ndev, offset);
507 nitrox_write_csr(ndev, offset, bmo_ctl2.value);
519 lbc_ctl.value = nitrox_read_csr(ndev, offset);
521 nitrox_write_csr(ndev, offset, lbc_ctl.value);
525 lbc_stat.value = nitrox_read_csr(ndev, offset);
541 lbc_int_ena.value = 0;
546 nitrox_write_csr(ndev, offset, lbc_int_ena.value);
563 vfcfg.value = nitrox_read_csr(ndev, NPS_CORE_GBL_VFCFG);
566 nitrox_write_csr(ndev, NPS_CORE_GBL_VFCFG, vfcfg.value);
619 rst_boot.value = nitrox_read_csr(ndev, offset);
624 emu_fuse.value = nitrox_read_csr(ndev, offset);
634 fus_dat1.value = nitrox_read_csr(ndev, offset);
655 u64 value = ~0ULL;
660 nitrox_write_csr(ndev, reg_addr, value);
664 nitrox_write_csr(ndev, reg_addr, value);
669 u64 value = ~0ULL;
674 nitrox_write_csr(ndev, reg_addr, value);
678 nitrox_write_csr(ndev, reg_addr, value);