Lines Matching defs:base

294 	if ((dd->is_async || dd->force_complete) && req->base.complete)
1153 struct atmel_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
1256 alg->halg.base.cra_priority = ATMEL_SHA_PRIORITY;
1257 alg->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
1258 alg->halg.base.cra_ctxsize = sizeof(struct atmel_sha_ctx);
1259 alg->halg.base.cra_module = THIS_MODULE;
1260 alg->halg.base.cra_init = atmel_sha_cra_init;
1275 .halg.base.cra_name = "sha1",
1276 .halg.base.cra_driver_name = "atmel-sha1",
1277 .halg.base.cra_blocksize = SHA1_BLOCK_SIZE,
1282 .halg.base.cra_name = "sha256",
1283 .halg.base.cra_driver_name = "atmel-sha256",
1284 .halg.base.cra_blocksize = SHA256_BLOCK_SIZE,
1291 .halg.base.cra_name = "sha224",
1292 .halg.base.cra_driver_name = "atmel-sha224",
1293 .halg.base.cra_blocksize = SHA224_BLOCK_SIZE,
1300 .halg.base.cra_name = "sha384",
1301 .halg.base.cra_driver_name = "atmel-sha384",
1302 .halg.base.cra_blocksize = SHA384_BLOCK_SIZE,
1303 .halg.base.cra_alignmask = 0x3,
1308 .halg.base.cra_name = "sha512",
1309 .halg.base.cra_driver_name = "atmel-sha512",
1310 .halg.base.cra_blocksize = SHA512_BLOCK_SIZE,
1311 .halg.base.cra_alignmask = 0x3,
1662 struct atmel_sha_ctx base;
2030 hmac->base.start = atmel_sha_hmac_start;
2045 alg->halg.base.cra_priority = ATMEL_SHA_PRIORITY;
2046 alg->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
2047 alg->halg.base.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx);
2048 alg->halg.base.cra_module = THIS_MODULE;
2049 alg->halg.base.cra_init = atmel_sha_hmac_cra_init;
2050 alg->halg.base.cra_exit = atmel_sha_hmac_cra_exit;
2065 .halg.base.cra_name = "hmac(sha1)",
2066 .halg.base.cra_driver_name = "atmel-hmac-sha1",
2067 .halg.base.cra_blocksize = SHA1_BLOCK_SIZE,
2072 .halg.base.cra_name = "hmac(sha224)",
2073 .halg.base.cra_driver_name = "atmel-hmac-sha224",
2074 .halg.base.cra_blocksize = SHA224_BLOCK_SIZE,
2079 .halg.base.cra_name = "hmac(sha256)",
2080 .halg.base.cra_driver_name = "atmel-hmac-sha256",
2081 .halg.base.cra_blocksize = SHA256_BLOCK_SIZE,
2086 .halg.base.cra_name = "hmac(sha384)",
2087 .halg.base.cra_driver_name = "atmel-hmac-sha384",
2088 .halg.base.cra_blocksize = SHA384_BLOCK_SIZE,
2093 .halg.base.cra_name = "hmac(sha512)",
2094 .halg.base.cra_driver_name = "atmel-hmac-sha512",
2095 .halg.base.cra_blocksize = SHA512_BLOCK_SIZE,
2114 struct atmel_sha_reqctx base;
2134 authctx->cb(authctx->aes_dev, err, authctx->base.dd->is_async);
2144 * Force atmel_sha_complete() to call req->base.complete(), ie
2251 struct atmel_sha_reqctx *ctx = &authctx->base;
2283 struct atmel_sha_reqctx *ctx = &authctx->base;
2297 ctx->flags = hmac->base.flags;
2306 struct atmel_sha_reqctx *ctx = &authctx->base;
2353 struct atmel_sha_reqctx *ctx = &authctx->base;
2406 struct atmel_sha_reqctx *ctx = &authctx->base;
2409 /* Prevent atmel_sha_complete() from calling req->base.complete(). */