Lines Matching refs:data
32 #define SCRATCH_FREQ_CORE_REG(data, cpu) (data->regs + CMU_CLKS_BASE + CORE_OFFSET(cpu))
35 #define CLUSTER_ACTMON_BASE(data, cl) \
36 (data->regs + (MMCRAB_CLUSTER_BASE(cl) + data->soc->actmon_cntr_base))
37 #define CORE_ACTMON_CNTR_REG(data, cl, cpu) (CLUSTER_ACTMON_BASE(data, cl) + CORE_OFFSET(cpu))
78 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
93 data->icc_dram_bw_scaling = false;
118 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
123 mpidr_id = (clusterid * data->soc->maxcpus_per_cluster) + cpuid;
124 freq_core_reg = SCRATCH_FREQ_CORE_REG(data, mpidr_id);
133 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
139 data->soc->ops->get_cpu_cluster_id(cpu, &cpuid, &clusterid);
142 mpidr_id = (clusterid * data->soc->maxcpus_per_cluster) + cpuid;
143 freq_core_reg = SCRATCH_FREQ_CORE_REG(data, mpidr_id);
158 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
163 data->soc->ops->get_cpu_cluster_id(c->cpu, &cpuid, &clusterid);
164 actmon_reg = CORE_ACTMON_CNTR_REG(data, clusterid, cpuid);
247 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
267 data->soc->ops->read_counters(c);
345 static void tegra194_set_cpu_ndiv_sysreg(void *data)
347 u64 ndiv_val = *(u64 *)data;
359 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
366 data->soc->ops->get_cpu_cluster_id(cpu, &cpuid, &clusterid);
372 ret = data->soc->ops->get_cpu_ndiv(cpu, cpuid, clusterid, &ndiv);
382 cpufreq_for_each_valid_entry(pos, data->bpmp_luts[clusterid]) {
401 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
436 data->icc_dram_bw_scaling = false;
476 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
477 int maxcpus_per_cluster = data->soc->maxcpus_per_cluster;
484 data->soc->ops->get_cpu_cluster_id(policy->cpu, NULL, &clusterid);
485 if (clusterid >= data->soc->num_clusters || !data->bpmp_luts[clusterid])
496 bpmp_lut = data->bpmp_luts[clusterid];
498 if (data->icc_dram_bw_scaling) {
506 data->icc_dram_bw_scaling = false;
543 struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
550 data->soc->ops->set_cpu_ndiv(policy, (u64)tbl->driver_data);
552 if (data->icc_dram_bw_scaling)
607 msg.tx.data = &req;
609 msg.rx.data = &resp;
665 struct tegra194_cpufreq_data *data;
670 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
671 if (!data)
677 data->soc = soc;
679 dev_err(&pdev->dev, "soc data missing\n");
683 data->bpmp_luts = devm_kcalloc(&pdev->dev, data->soc->num_clusters,
684 sizeof(*data->bpmp_luts), GFP_KERNEL);
685 if (!data->bpmp_luts)
690 data->regs = devm_platform_ioremap_resource(pdev, 0);
691 if (IS_ERR(data->regs))
692 return PTR_ERR(data->regs);
695 platform_set_drvdata(pdev, data);
708 for (i = 0; i < data->soc->num_clusters; i++) {
709 data->bpmp_luts[i] = tegra_cpufreq_bpmp_read_lut(pdev, bpmp, i);
710 if (IS_ERR(data->bpmp_luts[i])) {
711 err = PTR_ERR(data->bpmp_luts[i]);
716 tegra194_cpufreq_driver.driver_data = data;
728 data->icc_dram_bw_scaling = true;
749 { .compatible = "nvidia,tegra194-ccplex", .data = &tegra194_cpufreq_soc },
750 { .compatible = "nvidia,tegra234-ccplex-cluster", .data = &tegra234_cpufreq_soc },
751 { .compatible = "nvidia,tegra239-ccplex-cluster", .data = &tegra239_cpufreq_soc },