Lines Matching refs:data
74 struct tegra186_cpufreq_data *data = cpufreq_get_driver_data();
75 unsigned int cluster = data->cpus[policy->cpu].bpmp_cluster_id;
77 policy->freq_table = data->clusters[cluster].table;
87 struct tegra186_cpufreq_data *data = cpufreq_get_driver_data();
89 unsigned int edvd_offset = data->cpus[policy->cpu].edvd_offset;
92 writel(edvd_val, data->regs + edvd_offset);
99 struct tegra186_cpufreq_data *data = cpufreq_get_driver_data();
109 edvd_offset = data->cpus[policy->cpu].edvd_offset;
110 ndiv = readl(data->regs + edvd_offset) & EDVD_CORE_VOLT_FREQ_F_MASK;
111 cluster_id = data->cpus[policy->cpu].bpmp_cluster_id;
112 cluster = &data->clusters[cluster_id];
136 struct cpu_vhint_data *data;
141 virt = dma_alloc_coherent(bpmp->dev, sizeof(*data), &phys,
146 data = (struct cpu_vhint_data *)virt;
154 msg.tx.data = &req;
167 for (i = data->vfloor; i <= data->vceil; i++) {
168 u16 ndiv = data->ndiv[i];
170 if (ndiv < data->ndiv_min || ndiv > data->ndiv_max)
174 if (i > 0 && ndiv == data->ndiv[i - 1])
187 cluster->ref_clk_khz = data->ref_clk_hz / 1000;
188 cluster->div = data->pdiv * data->mdiv;
190 for (i = data->vfloor, j = 0; i <= data->vceil; i++) {
192 u16 ndiv = data->ndiv[i];
195 if (ndiv < data->ndiv_min || ndiv > data->ndiv_max)
199 if (i > 0 && ndiv == data->ndiv[i - 1])
213 dma_free_coherent(bpmp->dev, sizeof(*data), virt, phys);
220 struct tegra186_cpufreq_data *data;
224 data = devm_kzalloc(&pdev->dev,
225 struct_size(data, clusters, TEGRA186_NUM_CLUSTERS),
227 if (!data)
230 data->cpus = tegra186_cpus;
236 data->regs = devm_platform_ioremap_resource(pdev, 0);
237 if (IS_ERR(data->regs)) {
238 err = PTR_ERR(data->regs);
243 struct tegra186_cpufreq_cluster *cluster = &data->clusters[i];
252 tegra186_cpufreq_driver.driver_data = data;