Lines Matching defs:index
223 static int s5pv210_target(struct cpufreq_policy *policy, unsigned int index)
243 new_freq = s5pv210_freq_table[index].frequency;
245 /* Finding current running level index */
248 arm_volt = dvs_conf[index].arm_volt;
249 int_volt = dvs_conf[index].int_volt;
264 if ((index == L0) || (priv_index == L0))
268 if ((index == L4) || (priv_index == L4))
322 * 3. DMC1 refresh count for 133Mhz if (index == L4) is
349 reg |= ((clkdiv_val[index][0] << S5P_CLKDIV0_APLL_SHIFT) |
350 (clkdiv_val[index][1] << S5P_CLKDIV0_A2M_SHIFT) |
351 (clkdiv_val[index][2] << S5P_CLKDIV0_HCLK200_SHIFT) |
352 (clkdiv_val[index][3] << S5P_CLKDIV0_PCLK100_SHIFT) |
353 (clkdiv_val[index][4] << S5P_CLKDIV0_HCLK166_SHIFT) |
354 (clkdiv_val[index][5] << S5P_CLKDIV0_PCLK83_SHIFT) |
355 (clkdiv_val[index][6] << S5P_CLKDIV0_HCLK133_SHIFT) |
356 (clkdiv_val[index][7] << S5P_CLKDIV0_PCLK66_SHIFT));
367 if (index >= L3)
383 if (index == L0)
413 reg |= (clkdiv_val[index][10] << S5P_CLKDIV2_G3D_SHIFT) |
414 (clkdiv_val[index][9] << S5P_CLKDIV2_MFC_SHIFT);
448 reg |= (clkdiv_val[index][8] << S5P_CLKDIV6_ONEDRAM_SHIFT);
456 if (index != L4) {
481 pr_debug("Perf changed[L%d]\n", index);