Lines Matching refs:soc_data
65 const struct qcom_cpufreq_soc_data *soc_data;
116 const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
120 writel_relaxed(index, data->base + soc_data->reg_perf_state);
124 writel_relaxed(index, data->base + soc_data->reg_perf_state + i * 4);
136 if (qcom_cpufreq.soc_data->reg_current_vote)
137 lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_current_vote) & 0x3ff;
139 lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_domain_state) & 0xff;
148 const struct qcom_cpufreq_soc_data *soc_data;
157 soc_data = qcom_cpufreq.soc_data;
159 index = readl_relaxed(data->base + soc_data->reg_perf_state);
186 const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
191 writel_relaxed(index, data->base + soc_data->reg_perf_state);
195 writel_relaxed(index, data->base + soc_data->reg_perf_state + i * 4);
210 const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
238 data = readl_relaxed(drv_data->base + soc_data->reg_freq_lut +
239 i * soc_data->lut_row_size);
244 data = readl_relaxed(drv_data->base + soc_data->reg_volt_lut +
245 i * soc_data->lut_row_size);
391 if (qcom_cpufreq.soc_data->reg_intr_clr)
393 c_data->base + qcom_cpufreq.soc_data->reg_intr_clr);
542 if (!(readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_enable) & 0x1)) {
547 if (readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_dcvs_ctrl) & 0x1)
675 qcom_cpufreq.soc_data = of_device_get_match_data(dev);
676 if (!qcom_cpufreq.soc_data)