Lines Matching refs:cmr
52 * @cmr: array of Counter Mode Register states
62 u8 cmr[QUAD8_NUM_COUNTERS];
326 switch (u8_get_bits(priv->cmr[id], QUADRATURE_MODE)) {
402 ret = quad8_control_register_update(priv->map, priv->cmr, id, mode_cfg, QUADRATURE_MODE);
714 switch (u8_get_bits(priv->cmr[count->id], COUNT_MODE)) {
761 ret = quad8_control_register_update(priv->map, priv->cmr, count->id, count_mode,
854 switch (u8_get_bits(priv->cmr[count->id], COUNT_MODE)) {
882 switch (u8_get_bits(priv->cmr[count->id], COUNT_MODE)) {
1256 priv->cmr[channel] = SELECT_CMR | BINARY | u8_encode_bits(NORMAL_COUNT, COUNT_MODE) |
1258 ret = regmap_write(priv->map, QUAD8_CONTROL(channel), priv->cmr[channel]);