Lines Matching refs:tegra
108 static struct tegra186_tmr *tegra186_tmr_create(struct tegra186_timer *tegra,
114 tmr = devm_kzalloc(tegra->dev, sizeof(*tmr), GFP_KERNEL);
118 tmr->parent = tegra;
119 tmr->regs = tegra->regs + offset;
143 struct tegra186_timer *tegra = wdt->tmr->parent;
148 writel(value, tegra->regs + TKEIE(wdt->tmr->hwirq));
245 static struct tegra186_wdt *tegra186_wdt_create(struct tegra186_timer *tegra,
253 offset += tegra->soc->num_timers * 0x10000 + index * 0x10000;
255 wdt = devm_kzalloc(tegra->dev, sizeof(*wdt), GFP_KERNEL);
259 wdt->regs = tegra->regs + offset;
270 wdt->tmr = tegra186_tmr_create(tegra, source);
278 wdt->base.parent = tegra->dev;
280 err = watchdog_init_timeout(&wdt->base, 5, tegra->dev);
282 dev_err(tegra->dev, "failed to initialize timeout: %d\n", err);
286 err = devm_watchdog_register_device(tegra->dev, &wdt->base);
288 dev_err(tegra->dev, "failed to register WDT: %d\n", err);
297 struct tegra186_timer *tegra = container_of(cs, struct tegra186_timer,
301 hi = readl_relaxed(tegra->regs + TKETSC1);
312 lo = readl_relaxed(tegra->regs + TKETSC0);
313 hi = readl_relaxed(tegra->regs + TKETSC1);
319 static int tegra186_timer_tsc_init(struct tegra186_timer *tegra)
321 tegra->tsc.name = "tsc";
322 tegra->tsc.rating = 300;
323 tegra->tsc.read = tegra186_timer_tsc_read;
324 tegra->tsc.mask = CLOCKSOURCE_MASK(56);
325 tegra->tsc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
327 return clocksource_register_hz(&tegra->tsc, 31250000);
332 struct tegra186_timer *tegra = container_of(cs, struct tegra186_timer,
335 return readl_relaxed(tegra->regs + TKEOSC);
338 static int tegra186_timer_osc_init(struct tegra186_timer *tegra)
340 tegra->osc.name = "osc";
341 tegra->osc.rating = 300;
342 tegra->osc.read = tegra186_timer_osc_read;
343 tegra->osc.mask = CLOCKSOURCE_MASK(32);
344 tegra->osc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
346 return clocksource_register_hz(&tegra->osc, 38400000);
351 struct tegra186_timer *tegra = container_of(cs, struct tegra186_timer,
354 return readl_relaxed(tegra->regs + TKEUSEC);
357 static int tegra186_timer_usec_init(struct tegra186_timer *tegra)
359 tegra->usec.name = "usec";
360 tegra->usec.rating = 300;
361 tegra->usec.read = tegra186_timer_usec_read;
362 tegra->usec.mask = CLOCKSOURCE_MASK(32);
363 tegra->usec.flags = CLOCK_SOURCE_IS_CONTINUOUS;
365 return clocksource_register_hz(&tegra->usec, USEC_PER_SEC);
370 struct tegra186_timer *tegra = data;
372 if (watchdog_active(&tegra->wdt->base)) {
373 tegra186_wdt_disable(tegra->wdt);
374 tegra186_wdt_enable(tegra->wdt);
383 struct tegra186_timer *tegra;
387 tegra = devm_kzalloc(dev, sizeof(*tegra), GFP_KERNEL);
388 if (!tegra)
391 tegra->soc = of_device_get_match_data(dev);
392 dev_set_drvdata(dev, tegra);
393 tegra->dev = dev;
395 tegra->regs = devm_platform_ioremap_resource(pdev, 0);
396 if (IS_ERR(tegra->regs))
397 return PTR_ERR(tegra->regs);
406 tegra->wdt = tegra186_wdt_create(tegra, 0);
407 if (IS_ERR(tegra->wdt)) {
408 err = PTR_ERR(tegra->wdt);
413 err = tegra186_timer_tsc_init(tegra);
419 err = tegra186_timer_osc_init(tegra);
425 err = tegra186_timer_usec_init(tegra);
432 "tegra186-timer", tegra);
441 clocksource_unregister(&tegra->usec);
443 clocksource_unregister(&tegra->osc);
445 clocksource_unregister(&tegra->tsc);
451 struct tegra186_timer *tegra = platform_get_drvdata(pdev);
453 clocksource_unregister(&tegra->usec);
454 clocksource_unregister(&tegra->osc);
455 clocksource_unregister(&tegra->tsc);
460 struct tegra186_timer *tegra = dev_get_drvdata(dev);
462 if (watchdog_active(&tegra->wdt->base))
463 tegra186_wdt_disable(tegra->wdt);
470 struct tegra186_timer *tegra = dev_get_drvdata(dev);
472 if (watchdog_active(&tegra->wdt->base))
473 tegra186_wdt_enable(tegra->wdt);