Lines Matching defs:timer
53 * When we disable a timer, we need to wait at least for 2 cycles of
54 * the timer source clock. We will use for that the clocksource timer
66 static void sun5i_clkevt_time_stop(struct sun5i_timer *ce, u8 timer)
68 u32 val = readl(ce->base + TIMER_CTL_REG(timer));
69 writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer));
74 static void sun5i_clkevt_time_setup(struct sun5i_timer *ce, u8 timer, u32 delay)
76 writel(delay, ce->base + TIMER_INTVAL_LO_REG(timer));
79 static void sun5i_clkevt_time_start(struct sun5i_timer *ce, u8 timer, bool periodic)
81 u32 val = readl(ce->base + TIMER_CTL_REG(timer));
89 ce->base + TIMER_CTL_REG(timer));
266 dev_err(dev, "Can't get timer clock\n");
325 .name = "sun5i-timer",