Lines Matching refs:val
27 #define TIMER_IRQ_EN(val) BIT(val)
29 #define TIMER_IRQ_CLEAR(val) BIT(val)
30 #define TIMER_CTL_REG(val) (0x10 * val + 0x10)
33 #define TIMER_CTL_CLK_SRC(val) (((val) & 0x3) << 2)
35 #define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4)
37 #define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14)
38 #define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18)
58 u32 val = readl(base + TIMER_CTL_REG(timer));
59 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer));
72 u32 val = readl(base + TIMER_CTL_REG(timer));
75 val &= ~TIMER_CTL_ONESHOT;
77 val |= TIMER_CTL_ONESHOT;
79 writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
171 u32 val;
214 val = readl(timer_of_base(&to) + TIMER_IRQ_EN_REG);
215 writel(val | TIMER_IRQ_EN(0), timer_of_base(&to) + TIMER_IRQ_EN_REG);