Lines Matching refs:rate
109 unsigned long *rate)
114 if (DIV_ROUND_CLOSEST(*rate, 1 << i) < STM32_TARGET_CLKRATE)
120 /* Adjust rate and period given the prescaler value */
121 *rate = DIV_ROUND_CLOSEST(*rate, (1 << i));
122 priv->period = DIV_ROUND_UP(*rate, HZ);
126 struct device_node *np, unsigned long rate)
138 clockevents_config_and_register(&priv->clkevt, rate, 0x1,
146 unsigned long rate;
158 rate = clk_get_rate(ddata->clk);
159 if (!rate) {
185 stm32_clkevent_lp_set_prescaler(priv, &rate);
187 stm32_clkevent_lp_init(priv, pdev->dev.parent->of_node, rate);