Lines Matching refs:base
34 static void sprd_timer_enable(void __iomem *base, u32 flag)
36 u32 val = readl_relaxed(base + TIMER_CTL);
49 writel_relaxed(val, base + TIMER_CTL);
52 static void sprd_timer_disable(void __iomem *base)
54 u32 val = readl_relaxed(base + TIMER_CTL);
57 writel_relaxed(val, base + TIMER_CTL);
60 static void sprd_timer_update_counter(void __iomem *base, unsigned long cycles)
62 writel_relaxed(cycles & TIMER_VALUE_LO_MASK, base + TIMER_LOAD_LO);
63 writel_relaxed(0, base + TIMER_LOAD_HI);
66 static void sprd_timer_enable_interrupt(void __iomem *base)
68 writel_relaxed(TIMER_INT_EN, base + TIMER_INT);
71 static void sprd_timer_clear_interrupt(void __iomem *base)
73 u32 val = readl_relaxed(base + TIMER_INT);
76 writel_relaxed(val, base + TIMER_INT);