Lines Matching refs:timer
51 * struct mchp_pit64b_timer - PIT64B timer data structure
66 * @timer: PIT64B timer
70 struct mchp_pit64b_timer timer;
80 * @timer: PIT64B timer
84 struct mchp_pit64b_timer timer;
92 /* Base address for clocksource timer. */
94 /* Default cycles for clockevent timer. */
96 /* Delay timer. */
109 * timer value whatever the lapse of time between the accesses.
119 static inline void mchp_pit64b_reset(struct mchp_pit64b_timer *timer,
127 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
128 writel_relaxed(mode | timer->mode, timer->base + MCHP_PIT64B_MR);
129 writel_relaxed(high, timer->base + MCHP_PIT64B_MSB_PR);
130 writel_relaxed(low, timer->base + MCHP_PIT64B_LSB_PR);
131 writel_relaxed(irqs, timer->base + MCHP_PIT64B_IER);
132 writel_relaxed(MCHP_PIT64B_CR_START, timer->base + MCHP_PIT64B_CR);
135 static void mchp_pit64b_suspend(struct mchp_pit64b_timer *timer)
137 writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR);
138 if (timer->mode & MCHP_PIT64B_MR_SGCLK)
139 clk_disable_unprepare(timer->gclk);
140 clk_disable_unprepare(timer->pclk);
143 static void mchp_pit64b_resume(struct mchp_pit64b_timer *timer)
145 clk_prepare_enable(timer->pclk);
146 if (timer->mode & MCHP_PIT64B_MR_SGCLK)
147 clk_prepare_enable(timer->gclk);
152 struct mchp_pit64b_timer *timer = clksrc_to_mchp_pit64b_timer(cs);
154 mchp_pit64b_suspend(timer);
159 struct mchp_pit64b_timer *timer = clksrc_to_mchp_pit64b_timer(cs);
161 mchp_pit64b_resume(timer);
162 mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);
182 struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
185 mchp_pit64b_suspend(timer);
192 struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
195 mchp_pit64b_resume(timer);
197 mchp_pit64b_reset(timer, mchp_pit64b_ce_cycles, MCHP_PIT64B_MR_CONT,
205 struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
208 mchp_pit64b_resume(timer);
210 mchp_pit64b_reset(timer, mchp_pit64b_ce_cycles, MCHP_PIT64B_MR_ONE_SHOT,
219 struct mchp_pit64b_timer *timer = clkevt_to_mchp_pit64b_timer(cedev);
221 mchp_pit64b_reset(timer, evt, MCHP_PIT64B_MR_ONE_SHOT,
232 readl_relaxed(irq_data->timer.base + MCHP_PIT64B_ISR);
258 * @timer: pointer to pit64b timer to init
259 * @max_rate: maximum rate that timer's clock could use
261 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
269 * then the function falls back on using PCLK as clock source for PIT64B timer
279 * | | | | MUX |--->| Divider |->|timer| |
291 static int __init mchp_pit64b_init_mode(struct mchp_pit64b_timer *timer,
298 pclk_rate = clk_get_rate(timer->pclk);
302 timer->mode = 0;
305 gclk_round = clk_round_rate(timer->gclk, max_rate);
317 timer->mode |= MCHP_PIT64B_MR_SGCLK;
318 clk_set_rate(timer->gclk, gclk_round);
332 timer->mode |= MCHP_PIT64B_MR_SGCLK;
333 clk_set_rate(timer->gclk, gclk_round);
337 timer->mode |= MCHP_PIT64B_PRES_TO_MODE(best_pres);
340 timer->mode & MCHP_PIT64B_MR_SGCLK ? "gclk" : "pclk", best_pres,
341 timer->mode & MCHP_PIT64B_MR_SGCLK ?
347 static int __init mchp_pit64b_init_clksrc(struct mchp_pit64b_timer *timer,
357 mchp_pit64b_resume(timer);
358 mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0);
360 mchp_pit64b_cs_base = timer->base;
362 cs->timer.base = timer->base;
363 cs->timer.pclk = timer->pclk;
364 cs->timer.gclk = timer->gclk;
365 cs->timer.mode = timer->mode;
378 /* Stop timer. */
379 mchp_pit64b_suspend(timer);
394 static int __init mchp_pit64b_init_clkevt(struct mchp_pit64b_timer *timer,
406 ce->timer.base = timer->base;
407 ce->timer.pclk = timer->pclk;
408 ce->timer.gclk = timer->gclk;
409 ce->timer.mode = timer->mode;
436 struct mchp_pit64b_timer timer;
442 timer.pclk = of_clk_get_by_name(node, "pclk");
443 if (IS_ERR(timer.pclk))
444 return PTR_ERR(timer.pclk);
446 timer.gclk = of_clk_get_by_name(node, "gclk");
447 if (IS_ERR(timer.gclk))
448 return PTR_ERR(timer.gclk);
450 timer.base = of_iomap(node, 0);
451 if (!timer.base)
463 ret = mchp_pit64b_init_mode(&timer, MCHP_PIT64B_DEF_FREQ);
467 if (timer.mode & MCHP_PIT64B_MR_SGCLK)
468 clk_rate = clk_get_rate(timer.gclk);
470 clk_rate = clk_get_rate(timer.pclk);
471 clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1);
474 ret = mchp_pit64b_init_clkevt(&timer, clk_rate, irq);
476 ret = mchp_pit64b_init_clksrc(&timer, clk_rate);
486 iounmap(timer.base);