Lines Matching refs:base
52 void __iomem *base;
62 void __iomem *base;
76 return readl_relaxed(clockevent->base + reg);
82 writel_relaxed(val, clockevent->base + reg);
85 static void davinci_tim12_shutdown(void __iomem *base)
99 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
102 static void davinci_tim12_set_oneshot(void __iomem *base)
112 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
121 davinci_tim12_shutdown(clockevent->base);
132 davinci_tim12_set_oneshot(clockevent->base);
173 davinci_tim12_shutdown(clockevent->base);
182 return readl_relaxed(davinci_clocksource.base +
196 static void davinci_clocksource_init_tim34(void __iomem *base)
205 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM34);
206 writel_relaxed(UINT_MAX, base + DAVINCI_TIMER_REG_PRD34);
207 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
215 static void davinci_clocksource_init_tim12(void __iomem *base)
222 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM12);
223 writel_relaxed(UINT_MAX, base + DAVINCI_TIMER_REG_PRD12);
224 writel_relaxed(tcr, base + DAVINCI_TIMER_REG_TCR);
227 static void davinci_timer_init(void __iomem *base)
230 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TCR);
236 base + DAVINCI_TIMER_REG_TGCR);
238 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM12);
239 writel_relaxed(0x0, base + DAVINCI_TIMER_REG_TIM34);
247 void __iomem *base;
264 base = ioremap(timer_cfg->reg.start, resource_size(&timer_cfg->reg));
265 if (!base) {
271 davinci_timer_init(base);
283 clockevent->base = base;
311 davinci_clocksource.base = base;
316 davinci_clocksource_init_tim12(base);
320 davinci_clocksource_init_tim34(base);
344 iounmap(base);