Lines Matching defs:bits
44 * Each channel occupies 4 bits in TCON register, but there is a gap of 4
45 * bits (one channel) after channel 0, so channels have different numbering
49 * in its set of bits is 2 as opposed to 3 for other channels.
105 u8 bits;
107 bits = (fls(divisor) - 1) - pwm.variant.div_base;
113 reg |= bits << shift;
352 pwm.variant.bits, clock_rate);
354 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
362 pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
363 if (pwm.variant.bits == 16) {
468 .bits = 16,
481 .bits = 32,
494 .bits = 32,
507 .bits = 32,