Lines Matching defs:counter
61 * 1. Read the upper 32-bit timer counter register
62 * 2. Read the lower 32-bit timer counter register
63 * 3. Read the upper 32-bit timer counter register again. If the value is
65 * Otherwise the 64-bit timer counter value is correct.
69 u64 counter;
80 counter = upper;
81 counter <<= 32;
82 counter |= lower;
83 return counter;
101 u64 counter = gt_counter_read();
104 counter += delta;
110 writel_relaxed(lower_32_bits(counter), gt_base + GT_COMP0);
111 writel_relaxed(upper_32_bits(counter), gt_base + GT_COMP1);