Lines Matching refs:default_val
740 u8 misc_num, u32 default_val, u32 mask)
745 default_val &= mask;
746 if (boot_val != default_val) {
748 misc_num, boot_val, default_val);
761 u32 default_val;
763 default_val = PLLCX_MISC0_DEFAULT_VALUE & (~PLLCX_MISC0_RESET);
764 _pll_misc_chk_default(clk_base, params, 0, default_val,
767 default_val = PLLCX_MISC1_DEFAULT_VALUE & (~PLLCX_MISC1_IDDQ);
768 _pll_misc_chk_default(clk_base, params, 1, default_val,
771 default_val = PLLCX_MISC2_DEFAULT_VALUE;
772 _pll_misc_chk_default(clk_base, params, 2, default_val,
775 default_val = PLLCX_MISC3_DEFAULT_VALUE;
776 _pll_misc_chk_default(clk_base, params, 3, default_val,
939 u32 default_val;
956 default_val = misc0_val;
957 _pll_misc_chk_default(clk_base, plldss->params, 0, default_val,
967 default_val = misc1_val;
969 default_val, PLLDSS_MISC1_CFG_WRITE_MASK);
970 default_val = misc2_val;
972 default_val, PLLDSS_MISC2_CTRL1_WRITE_MASK);
973 default_val = misc3_val;
975 default_val, PLLDSS_MISC3_CTRL2_WRITE_MASK);
977 default_val = misc1_val;
979 default_val, PLLDSS_MISC1_CFG_WRITE_MASK &
1145 u32 default_val;
1147 default_val = PLLX_MISC0_DEFAULT_VALUE;
1149 _pll_misc_chk_default(clk_base, pll->params, 0, default_val,
1152 default_val = PLLX_MISC1_DEFAULT_VALUE;
1153 _pll_misc_chk_default(clk_base, pll->params, 1, default_val,
1157 default_val = PLLX_MISC2_DEFAULT_VALUE;
1159 default_val, PLLX_MISC2_EN_DYNRAMP);
1161 default_val = PLLX_MISC3_DEFAULT_VALUE & (~PLLX_MISC3_IDDQ);
1162 _pll_misc_chk_default(clk_base, pll->params, 3, default_val,
1165 default_val = PLLX_MISC4_DEFAULT_VALUE;
1166 _pll_misc_chk_default(clk_base, pll->params, 4, default_val,
1169 default_val = PLLX_MISC5_DEFAULT_VALUE;
1170 _pll_misc_chk_default(clk_base, pll->params, 5, default_val,