Lines Matching defs:pllu
1359 static void tegra210_pllu_set_defaults(struct tegra_clk_pll_params *pllu)
1361 u32 val = readl_relaxed(clk_base + pllu->base_reg);
1363 pllu->defaults_set = true;
1371 pllu_check_defaults(pllu, false);
1372 if (!pllu->defaults_set)
1376 val = readl_relaxed(clk_base + pllu->ext_misc_reg[0]);
1379 writel_relaxed(val, clk_base + pllu->ext_misc_reg[0]);
1381 val = readl_relaxed(clk_base + pllu->ext_misc_reg[1]);
1384 writel_relaxed(val, clk_base + pllu->ext_misc_reg[1]);
1392 clk_base + pllu->ext_misc_reg[0]);
1394 clk_base + pllu->ext_misc_reg[1]);
2895 struct tegra_clk_pll pllu;
2910 pllu.params = &pll_u_vco_params;
2911 reg = readl_relaxed(clk_base + pllu.params->ext_misc_reg[0]);
2912 reg &= ~BIT(pllu.params->iddq_bit_idx);
2913 writel_relaxed(reg, clk_base + pllu.params->ext_misc_reg[0]);
2932 ret = tegra210_wait_for_mask(&pllu, PLLU_BASE, PLL_BASE_LOCK);
2947 /* skip initialization when pllu is in hw controlled mode */