Lines Matching defs:reg
18 if (sdm->enable && !(readl(common->base + common->reg) & sdm->enable))
31 u32 reg;
44 reg = readl(common->base + sdm->tuning_reg);
45 writel(reg | sdm->tuning_enable, common->base + sdm->tuning_reg);
49 reg = readl(common->base + common->reg);
50 writel(reg | sdm->enable, common->base + common->reg);
59 u32 reg;
65 reg = readl(common->base + common->reg);
66 writel(reg & ~sdm->enable, common->base + common->reg);
70 reg = readl(common->base + sdm->tuning_reg);
71 writel(reg & ~sdm->tuning_enable, common->base + sdm->tuning_reg);
115 u32 reg;
126 reg = readl(common->base + sdm->tuning_reg);
128 pr_debug("%s: pattern reg is 0x%x",
129 clk_hw_get_name(&common->hw), reg);
132 if (sdm->table[i].pattern == reg &&