Lines Matching defs:vco
9 #define pr_fmt(fmt) "clk-vco-pll: " fmt
23 * vco = (2 * M[15:8] * Fin)/N
26 * vco = (2 * M[15:0] * Fin)/(256 * N)
30 * vco and pll are very closely bound to each other, "vco needs to program:
34 * clk_register_vco_pll() registers instances of both vco & pll.
36 * set_rate to vco. A single rate table exists for both the clocks, which
94 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) {
97 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index,
128 if (pll->vco->lock)
129 spin_lock_irqsave(pll->vco->lock, flags);
131 p = readl_relaxed(pll->vco->cfg_reg);
133 if (pll->vco->lock)
134 spin_unlock_irqrestore(pll->vco->lock, flags);
145 struct pll_rate_tbl *rtbl = pll->vco->rtbl;
151 if (pll->vco->lock)
152 spin_lock_irqsave(pll->vco->lock, flags);
154 val = readl_relaxed(pll->vco->cfg_reg);
157 writel_relaxed(val, pll->vco->cfg_reg);
159 if (pll->vco->lock)
160 spin_unlock_irqrestore(pll->vco->lock, flags);
174 struct clk_vco *vco = to_clk_vco(hw);
176 return pll_calc_rate(vco->rtbl, prate, index, NULL);
182 struct clk_vco *vco = to_clk_vco(hw);
186 vco->rtbl_cnt, &unused);
192 struct clk_vco *vco = to_clk_vco(hw);
196 if (vco->lock)
197 spin_lock_irqsave(vco->lock, flags);
199 mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK;
201 val = readl_relaxed(vco->cfg_reg);
203 if (vco->lock)
204 spin_unlock_irqrestore(vco->lock, flags);
226 /* Configures new clock rate of vco */
230 struct clk_vco *vco = to_clk_vco(hw);
231 struct pll_rate_tbl *rtbl = vco->rtbl;
235 clk_round_rate_index(hw, drate, prate, vco_calc_rate, vco->rtbl_cnt,
238 if (vco->lock)
239 spin_lock_irqsave(vco->lock, flags);
241 val = readl_relaxed(vco->mode_reg);
244 writel_relaxed(val, vco->mode_reg);
246 val = readl_relaxed(vco->cfg_reg);
258 writel_relaxed(val, vco->cfg_reg);
260 if (vco->lock)
261 spin_unlock_irqrestore(vco->lock, flags);
279 struct clk_vco *vco;
291 vco = kzalloc(sizeof(*vco), GFP_KERNEL);
292 if (!vco)
300 vco->mode_reg = mode_reg;
301 vco->cfg_reg = cfg_reg;
302 vco->rtbl = rtbl;
303 vco->rtbl_cnt = rtbl_cnt;
304 vco->lock = lock;
305 vco->hw.init = &vco_init;
307 pll->vco = vco;
335 vco_clk = clk_register(NULL, &vco->hw);
351 kfree(vco);
353 pr_err("Failed to register vco pll clock\n");