Lines Matching refs:socfpgaclk
43 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
48 reg = readl(socfpgaclk->hw.reg + 0x8);
64 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
69 reg = readl(socfpgaclk->hw.reg);
75 reg = readl(socfpgaclk->hw.reg + 0x24);
85 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
92 reg = readl(socfpgaclk->hw.reg);
99 reg = readl(socfpgaclk->hw.reg + 0x4);
109 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
112 div = ((readl(socfpgaclk->hw.reg) &
122 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
125 pll_src = readl(socfpgaclk->hw.reg);
132 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
135 pll_src = readl(socfpgaclk->hw.reg);
142 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
146 reg = readl(socfpgaclk->hw.reg);
148 writel(reg, socfpgaclk->hw.reg);
155 struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
159 reg = readl(socfpgaclk->hw.reg + 0x4);
161 writel(reg, socfpgaclk->hw.reg + 0x4);