clk-pll.c - OpenGrok cross reference for /kernel/linux/linux-6.6/drivers/clk/samsung/clk-pll.c

Lines Matching refs:pll_con3
437 	u32 mdiv, pdiv, sdiv, pll_con3;
440 	pll_con3 = readl_relaxed(pll->con_reg);
441 	mdiv = (pll_con3 >> PLL0822X_MDIV_SHIFT) & PLL0822X_MDIV_MASK;
442 	pdiv = (pll_con3 >> PLL0822X_PDIV_SHIFT) & PLL0822X_PDIV_MASK;
443 	sdiv = (pll_con3 >> PLL0822X_SDIV_SHIFT) & PLL0822X_SDIV_MASK;
456 	u32 pll_con3;
467 	pll_con3 = readl_relaxed(pll->con_reg);
468 	pll_con3 &= ~((PLL0822X_MDIV_MASK << PLL0822X_MDIV_SHIFT) |
471 	pll_con3 |= (rate->mdiv << PLL0822X_MDIV_SHIFT) |
480 	writel_relaxed(pll_con3, pll->con_reg);
483 	if (pll_con3 & BIT(pll->enable_offs))
522 	u32 mdiv, pdiv, sdiv, pll_con3, pll_con5;
526 	pll_con3 = readl_relaxed(pll->con_reg);
528 	mdiv = (pll_con3 >> PLL0831X_MDIV_SHIFT) & PLL0831X_MDIV_MASK;
529 	pdiv = (pll_con3 >> PLL0831X_PDIV_SHIFT) & PLL0831X_PDIV_MASK;
530 	sdiv = (pll_con3 >> PLL0831X_SDIV_SHIFT) & PLL0831X_SDIV_MASK;
545 	u32 pll_con3, pll_con5;
555 	pll_con3 = readl_relaxed(pll->con_reg);
559 	pll_con3 &= ~((PLL0831X_MDIV_MASK << PLL0831X_MDIV_SHIFT) |
562 	pll_con3 |= (rate->mdiv << PLL0831X_MDIV_SHIFT) |
576 	writel_relaxed(pll_con3, pll->con_reg);
580 	if (pll_con3 & BIT(pll->enable_offs))