Lines Matching refs:pdiv
153 u32 pll_con, mdiv, pdiv, sdiv;
158 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK;
162 do_div(fvco, (pdiv + 2) << sdiv);
186 u32 pll_con, mdiv, pdiv, sdiv;
191 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK;
195 do_div(fvco, pdiv << sdiv);
223 u32 mdiv, pdiv, sdiv, pll_con;
228 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
232 do_div(fvco, (pdiv << sdiv));
245 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
275 writel_relaxed(rate->pdiv * PLL35XX_LOCK_FACTOR,
283 (rate->pdiv << PLL35XX_PDIV_SHIFT) |
327 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
334 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
339 do_div(fvco, (pdiv << sdiv));
354 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv ||
385 writel_relaxed(rate->pdiv * PLL36XX_LOCK_FACTOR, pll->lock_reg);
392 (rate->pdiv << PLL36XX_PDIV_SHIFT) |
437 u32 mdiv, pdiv, sdiv, pll_con3;
442 pdiv = (pll_con3 >> PLL0822X_PDIV_SHIFT) & PLL0822X_PDIV_MASK;
446 do_div(fvco, (pdiv << sdiv));
472 (rate->pdiv << PLL0822X_PDIV_SHIFT) |
476 writel_relaxed(rate->pdiv * PLL0822X_LOCK_FACTOR,
522 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5;
529 pdiv = (pll_con3 >> PLL0831X_PDIV_SHIFT) & PLL0831X_PDIV_MASK;
534 do_div(fvco, (pdiv << sdiv));
563 (rate->pdiv << PLL0831X_PDIV_SHIFT) |
573 writel_relaxed(rate->pdiv * PLL0831X_LOCK_FACTOR, pll->lock_reg);
620 u32 mdiv, pdiv, sdiv, pll_con;
625 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
632 do_div(fvco, (pdiv << sdiv));
646 return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
682 (rate->pdiv << PLL45XX_PDIV_SHIFT) |
693 writel_relaxed(rate->pdiv * PLL4502_LOCK_FACTOR, pll->lock_reg);
696 writel_relaxed(rate->pdiv * PLL4508_LOCK_FACTOR, pll->lock_reg);
753 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
760 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
768 do_div(fvco, (pdiv << sdiv));
783 return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
815 lock = rate->pdiv * PLL46XX_LOCK_FACTOR;
834 (rate->pdiv << PLL46XX_PDIV_SHIFT) |
882 u32 mdiv, pdiv, sdiv, pll_con;
888 pdiv = (pll_con >> PLL6552_PDIV_SHIFT_2416) & PLL6552_PDIV_MASK;
891 pdiv = (pll_con >> PLL6552_PDIV_SHIFT) & PLL6552_PDIV_MASK;
896 do_div(fvco, (pdiv << sdiv));
922 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
928 pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK;
933 do_div(fvco, (pdiv << sdiv));
1001 u32 mdiv, pdiv, sdiv, pll_con;
1006 pdiv = (pll_con >> PLL2550XX_P_SHIFT) & PLL2550XX_P_MASK;
1010 do_div(fvco, (pdiv << sdiv));
1015 static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con)
1022 return mdiv != old_mdiv || pdiv != old_pdiv;
1042 if (!(samsung_pll2550xx_mp_change(rate->mdiv, rate->pdiv, tmp))) {
1052 writel_relaxed(rate->pdiv * PLL2550XX_LOCK_FACTOR, pll->lock_reg);
1059 (rate->pdiv << PLL2550XX_P_SHIFT) |
1102 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
1107 pdiv = (pll_con0 >> PLL2650X_P_SHIFT) & PLL2650X_P_MASK;
1114 do_div(fout, (pdiv << sdiv));
1139 writel_relaxed(rate->pdiv * PLL2650X_LOCK_FACTOR, pll->lock_reg);
1146 (rate->pdiv << PLL2650X_P_SHIFT) |
1193 u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;
1200 pdiv = (pll_con0 >> PLL2650XX_PDIV_SHIFT) & PLL2650XX_PDIV_MASK;
1205 do_div(fvco, (pdiv << sdiv));
1233 pll_con0 |= rate->pdiv << PLL2650XX_PDIV_SHIFT;
1243 writel_relaxed(PLL2650XX_LOCK_FACTOR * rate->pdiv, pll->lock_reg);