Lines Matching refs:con1
655 u32 con0, con1;
666 con1 = readl_relaxed(pll->con_reg + 0x4);
668 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {
686 con1 = readl_relaxed(pll->con_reg + 0x4);
687 con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT);
688 con1 |= (rate->afc << PLL45XX_AFC_SHIFT);
703 writel_relaxed(con1, pll->con_reg + 0x4);
792 u32 con0, con1, lock;
803 con1 = readl_relaxed(pll->con_reg + 0x4);
805 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {
838 con1 = readl_relaxed(pll->con_reg + 0x4);
839 con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) |
842 con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) |
849 writel_relaxed(con1, pll->con_reg + 0x4);
1125 u32 con0, con1;
1136 con1 = readl_relaxed(pll->con_reg + 4);
1151 con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT);
1152 con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT);
1153 writel_relaxed(con1, pll->con_reg + 4);