Lines Matching defs:pll_con1
327 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
332 pll_con1 = readl_relaxed(pll->con_reg + 4);
336 kdiv = (s16)(pll_con1 & PLL36XX_KDIV_MASK);
346 const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1)
352 old_kdiv = (pll_con1 >> PLL36XX_KDIV_SHIFT) & PLL36XX_KDIV_MASK;
362 u32 pll_con0, pll_con1;
373 pll_con1 = readl_relaxed(pll->con_reg + 4);
375 if (!(samsung_pll36xx_mpk_change(rate, pll_con0, pll_con1))) {
396 pll_con1 &= ~(PLL36XX_KDIV_MASK << PLL36XX_KDIV_SHIFT);
397 pll_con1 |= rate->kdiv << PLL36XX_KDIV_SHIFT;
398 writel_relaxed(pll_con1, pll->con_reg + 4);
637 static bool samsung_pll45xx_mp_change(u32 pll_con0, u32 pll_con1,
644 old_afc = (pll_con1 >> PLL45XX_AFC_SHIFT) & PLL45XX_AFC_MASK;
753 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
757 pll_con1 = readl_relaxed(pll->con_reg + 4);
762 kdiv = pll->type == pll_4650c ? pll_con1 & PLL4650C_KDIV_MASK :
763 pll_con1 & PLL46XX_KDIV_MASK;
774 static bool samsung_pll46xx_mpk_change(u32 pll_con0, u32 pll_con1,
781 old_kdiv = (pll_con1 >> PLL46XX_KDIV_SHIFT) & PLL46XX_KDIV_MASK;
922 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
926 pll_con1 = readl_relaxed(pll->con_reg + 0x4);
930 kdiv = (pll_con1 >> PLL6553_KDIV_SHIFT) & PLL6553_KDIV_MASK;
1102 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
1110 pll_con1 = readl_relaxed(pll->con_reg + 4);
1111 kdiv = (s16)((pll_con1 >> PLL2650X_K_SHIFT) & PLL2650X_K_MASK);