Lines Matching defs:ENABLE_PCLK_AUD
2934 #define ENABLE_PCLK_AUD 0x0900
2948 ENABLE_PCLK_AUD,
3021 /* ENABLE_PCLK_AUD */
3022 GATE(CLK_PCLK_WDT1, "pclk_wdt1", "div_aclk_aud", ENABLE_PCLK_AUD,
3024 GATE(CLK_PCLK_WDT0, "pclk_wdt0", "div_aclk_aud", ENABLE_PCLK_AUD,
3026 GATE(CLK_PCLK_SFR1, "pclk_sfr1", "div_aclk_aud", ENABLE_PCLK_AUD,
3029 ENABLE_PCLK_AUD, 10, 0, 0),
3031 ENABLE_PCLK_AUD, 9, CLK_IGNORE_UNUSED, 0),
3033 ENABLE_PCLK_AUD, 8, CLK_IGNORE_UNUSED, 0),
3035 ENABLE_PCLK_AUD, 7, CLK_IGNORE_UNUSED, 0),
3037 ENABLE_PCLK_AUD, 6, 0, 0),
3039 ENABLE_PCLK_AUD, 5, 0, 0),
3041 ENABLE_PCLK_AUD, 4, 0, 0),
3043 ENABLE_PCLK_AUD, 3, 0, 0),
3044 GATE(CLK_PCLK_TIMER, "pclk_timer", "div_aclk_aud", ENABLE_PCLK_AUD,
3047 ENABLE_PCLK_AUD, 0, 0, 0),