Lines Matching refs:MUX
473 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
474 MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
475 MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
476 MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2),
478 MUX(0, "mout_aclk333_432_gscl", mout_group6_5800_p, SRC_TOP1, 0, 2),
479 MUX(0, "mout_aclk333_432_isp", mout_group6_5800_p, SRC_TOP1, 4, 2),
480 MUX(0, "mout_aclk333_432_isp0", mout_group6_5800_p, SRC_TOP1, 12, 2),
481 MUX(0, "mout_aclk266", mout_group5_5800_p, SRC_TOP1, 20, 2),
482 MUX(0, "mout_aclk333", mout_group1_5800_p, SRC_TOP1, 28, 2),
484 MUX(0, "mout_aclk400_disp1", mout_group7_5800_p, SRC_TOP2, 4, 3),
485 MUX(0, "mout_aclk333_g2d", mout_group5_5800_p, SRC_TOP2, 8, 2),
486 MUX(0, "mout_aclk266_g2d", mout_group5_5800_p, SRC_TOP2, 12, 2),
487 MUX(0, "mout_aclk300_jpeg", mout_group5_5800_p, SRC_TOP2, 20, 2),
488 MUX(0, "mout_aclk300_disp1", mout_group5_5800_p, SRC_TOP2, 24, 2),
489 MUX(0, "mout_aclk300_gscl", mout_group5_5800_p, SRC_TOP2, 28, 2),
491 MUX(CLK_MOUT_MX_MSPLL_CCORE_PHY, "mout_mx_mspll_ccore_phy",
494 MUX(CLK_MOUT_MX_MSPLL_CCORE, "mout_mx_mspll_ccore",
498 MUX(CLK_SCLK_BPLL, "sclk_bpll", mout_bpll_p, SRC_TOP7, 24, 1),
499 MUX(0, "mout_epll2", mout_epll2_5800_p, SRC_TOP7, 28, 1),
501 MUX(0, "mout_aclk550_cam", mout_group3_5800_p, SRC_TOP8, 16, 3),
502 MUX(0, "mout_aclkfl1_550_cam", mout_group3_5800_p, SRC_TOP8, 20, 3),
503 MUX(0, "mout_aclk432_cam", mout_group6_5800_p, SRC_TOP8, 24, 2),
504 MUX(0, "mout_aclk432_scaler", mout_group6_5800_p, SRC_TOP8, 28, 2),
508 MUX(0, "mout_user_aclk550_cam", mout_group15_5800_p,
510 MUX(0, "mout_user_aclkfl1_550_cam", mout_group13_5800_p,
512 MUX(0, "mout_user_aclk432_cam", mout_group11_5800_p,
514 MUX(0, "mout_user_aclk432_scaler", mout_group9_5800_p,
517 MUX(0, "mout_sw_aclk550_cam", mout_group14_5800_p, SRC_TOP13, 16, 1),
518 MUX(0, "mout_sw_aclkfl1_550_cam", mout_group12_5800_p,
520 MUX(0, "mout_sw_aclk432_cam", mout_group10_5800_p,
522 MUX(0, "mout_sw_aclk432_scaler", mout_group8_5800_p,
525 MUX(0, "mout_fimd1", mout_group2_p, SRC_DISP10, 4, 3),
552 MUX(0, "sclk_bpll", mout_bpll_p, TOP_SPARE2, 0, 1),
553 MUX(0, "mout_aclk400_wcore_bpll", mout_aclk400_wcore_bpll_p,
556 MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2),
557 MUX(0, "mout_aclk400_mscl", mout_group1_p, SRC_TOP0, 4, 2),
558 MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2),
559 MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2),
561 MUX(0, "mout_aclk333_432_gscl", mout_group4_p, SRC_TOP1, 0, 2),
562 MUX(0, "mout_aclk333_432_isp", mout_group4_p,
564 MUX(0, "mout_aclk333_432_isp0", mout_group4_p, SRC_TOP1, 12, 2),
565 MUX(0, "mout_aclk266", mout_group1_p, SRC_TOP1, 20, 2),
566 MUX(0, "mout_aclk333", mout_group1_p, SRC_TOP1, 28, 2),
568 MUX(0, "mout_aclk400_disp1", mout_group1_p, SRC_TOP2, 4, 2),
569 MUX(0, "mout_aclk333_g2d", mout_group1_p, SRC_TOP2, 8, 2),
570 MUX(0, "mout_aclk266_g2d", mout_group1_p, SRC_TOP2, 12, 2),
571 MUX(0, "mout_aclk300_jpeg", mout_group1_p, SRC_TOP2, 20, 2),
572 MUX(0, "mout_aclk300_disp1", mout_group1_p, SRC_TOP2, 24, 2),
573 MUX(0, "mout_aclk300_gscl", mout_group1_p, SRC_TOP2, 28, 2),
575 MUX(CLK_MOUT_MX_MSPLL_CCORE, "mout_mx_mspll_ccore",
580 MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1),
600 MUX(0, "mout_user_pclk66_gpio", mout_user_pclk66_gpio_p,
602 MUX(CLK_MOUT_MSPLL_KFC, "mout_mspll_kfc", mout_mspll_cpu_p,
604 MUX(CLK_MOUT_MSPLL_CPU, "mout_mspll_cpu", mout_mspll_cpu_p,
608 MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
611 MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
613 MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),
614 MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2),
615 MUX(0, "mout_pclk200_fsys", mout_group1_p, SRC_TOP0, 24, 2),
616 MUX(0, "mout_aclk200_fsys", mout_group1_p, SRC_TOP0, 28, 2),
618 MUX(0, "mout_aclk66", mout_group1_p, SRC_TOP1, 8, 2),
619 MUX(0, "mout_aclk166", mout_group1_p, SRC_TOP1, 24, 2),
624 MUX(0, "mout_user_aclk400_isp", mout_user_aclk400_isp_p,
626 MUX(0, "mout_user_aclk400_mscl", mout_user_aclk400_mscl_p,
628 MUX(CLK_MOUT_USER_ACLK200_DISP1, "mout_user_aclk200_disp1",
630 MUX(0, "mout_user_aclk200_fsys2", mout_user_aclk200_fsys2_p,
632 MUX(0, "mout_user_aclk400_wcore", mout_user_aclk400_wcore_p,
634 MUX(0, "mout_user_aclk100_noc", mout_user_aclk100_noc_p,
636 MUX(0, "mout_user_pclk200_fsys", mout_user_pclk200_fsys_p,
638 MUX(0, "mout_user_aclk200_fsys", mout_user_aclk200_fsys_p,
641 MUX(0, "mout_user_aclk333_432_gscl", mout_user_aclk333_432_gscl_p,
643 MUX(0, "mout_user_aclk333_432_isp", mout_user_aclk333_432_isp_p,
645 MUX(0, "mout_user_aclk66_peric", mout_user_aclk66_peric_p,
647 MUX(0, "mout_user_aclk333_432_isp0", mout_user_aclk333_432_isp0_p,
649 MUX(0, "mout_user_aclk266_isp", mout_user_aclk266_isp_p,
651 MUX(0, "mout_user_aclk266", mout_user_aclk266_p, SRC_TOP4, 20, 1),
652 MUX(0, "mout_user_aclk166", mout_user_aclk166_p, SRC_TOP4, 24, 1),
653 MUX(CLK_MOUT_USER_ACLK333, "mout_user_aclk333", mout_user_aclk333_p,
656 MUX(CLK_MOUT_USER_ACLK400_DISP1, "mout_user_aclk400_disp1",
658 MUX(0, "mout_user_aclk66_psgen", mout_user_aclk66_peric_p,
660 MUX(0, "mout_user_aclk333_g2d", mout_user_aclk333_g2d_p,
662 MUX(0, "mout_user_aclk266_g2d", mout_user_aclk266_g2d_p,
666 MUX(0, "mout_user_aclk300_jpeg", mout_user_aclk300_jpeg_p,
668 MUX(CLK_MOUT_USER_ACLK300_DISP1, "mout_user_aclk300_disp1",
670 MUX(CLK_MOUT_USER_ACLK300_GSCL, "mout_user_aclk300_gscl",
673 MUX(0, "mout_sclk_mpll", mout_mpll_p, SRC_TOP6, 0, 1),
676 MUX(CLK_MOUT_SCLK_SPLL, "mout_sclk_spll", mout_spll_p, SRC_TOP6, 8, 1),
677 MUX(0, "mout_sclk_ipll", mout_ipll_p, SRC_TOP6, 12, 1),
678 MUX(0, "mout_sclk_rpll", mout_rpll_p, SRC_TOP6, 16, 1),
681 MUX(0, "mout_sclk_dpll", mout_dpll_p, SRC_TOP6, 24, 1),
682 MUX(0, "mout_sclk_cpll", mout_cpll_p, SRC_TOP6, 28, 1),
684 MUX(0, "mout_sw_aclk400_isp", mout_sw_aclk400_isp_p,
686 MUX(0, "mout_sw_aclk400_mscl", mout_sw_aclk400_mscl_p,
688 MUX(CLK_MOUT_SW_ACLK200, "mout_sw_aclk200", mout_sw_aclk200_p,
690 MUX(0, "mout_sw_aclk200_fsys2", mout_sw_aclk200_fsys2_p,
692 MUX(0, "mout_sw_aclk400_wcore", mout_sw_aclk400_wcore_p,
694 MUX(0, "mout_sw_aclk100_noc", mout_sw_aclk100_noc_p,
696 MUX(0, "mout_sw_pclk200_fsys", mout_sw_pclk200_fsys_p,
698 MUX(0, "mout_sw_aclk200_fsys", mout_sw_aclk200_fsys_p,
701 MUX(0, "mout_sw_aclk333_432_gscl", mout_sw_aclk333_432_gscl_p,
703 MUX(0, "mout_sw_aclk333_432_isp", mout_sw_aclk333_432_isp_p,
705 MUX(0, "mout_sw_aclk66", mout_sw_aclk66_p, SRC_TOP11, 8, 1),
706 MUX(0, "mout_sw_aclk333_432_isp0", mout_sw_aclk333_432_isp0_p,
708 MUX(0, "mout_sw_aclk266", mout_sw_aclk266_p, SRC_TOP11, 20, 1),
709 MUX(0, "mout_sw_aclk166", mout_sw_aclk166_p, SRC_TOP11, 24, 1),
710 MUX(CLK_MOUT_SW_ACLK333, "mout_sw_aclk333", mout_sw_aclk333_p,
713 MUX(CLK_MOUT_SW_ACLK400, "mout_sw_aclk400_disp1",
715 MUX(0, "mout_sw_aclk333_g2d", mout_sw_aclk333_g2d_p,
717 MUX(0, "mout_sw_aclk266_g2d", mout_sw_aclk266_g2d_p,
721 MUX(0, "mout_sw_aclk300_jpeg", mout_sw_aclk300_jpeg_p,
723 MUX(CLK_MOUT_SW_ACLK300, "mout_sw_aclk300_disp1",
725 MUX(CLK_MOUT_SW_ACLK300_GSCL, "mout_sw_aclk300_gscl",
729 MUX(0, "mout_mipi1", mout_group2_p, SRC_DISP10, 16, 3),
730 MUX(0, "mout_dp1", mout_group2_p, SRC_DISP10, 20, 3),
731 MUX(0, "mout_pixel", mout_group2_p, SRC_DISP10, 24, 3),
732 MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_DISP10, 28, 1),
733 MUX(0, "mout_fimd1_opt", mout_group2_p, SRC_DISP10, 8, 3),
735 MUX(0, "mout_fimd1_final", mout_fimd1_final_p, TOP_SPARE2, 8, 1),
744 MUX(CLK_MOUT_MAUDIO0, "mout_maudio0", mout_maudio0_p, SRC_MAU, 28, 3),
747 MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3),
748 MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3),
749 MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3),
750 MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3),
751 MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3),
752 MUX(0, "mout_unipro", mout_group2_p, SRC_FSYS, 24, 3),
753 MUX(0, "mout_mphy_refclk", mout_group2_p, SRC_FSYS, 28, 3),
756 MUX(0, "mout_uart0", mout_group2_p, SRC_PERIC0, 4, 3),
757 MUX(0, "mout_uart1", mout_group2_p, SRC_PERIC0, 8, 3),
758 MUX(0, "mout_uart2", mout_group2_p, SRC_PERIC0, 12, 3),
759 MUX(0, "mout_uart3", mout_group2_p, SRC_PERIC0, 16, 3),
760 MUX(0, "mout_pwm", mout_group2_p, SRC_PERIC0, 24, 3),
761 MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIC0, 28, 3),
762 MUX(0, "mout_audio0", mout_audio0_p, SRC_PERIC1, 8, 3),
763 MUX(0, "mout_audio1", mout_audio1_p, SRC_PERIC1, 12, 3),
764 MUX(0, "mout_audio2", mout_audio2_p, SRC_PERIC1, 16, 3),
765 MUX(0, "mout_spi0", mout_group2_p, SRC_PERIC1, 20, 3),
766 MUX(0, "mout_spi1", mout_group2_p, SRC_PERIC1, 24, 3),
767 MUX(0, "mout_spi2", mout_group2_p, SRC_PERIC1, 28, 3),
770 MUX(0, "mout_pwm_isp", mout_group2_p, SRC_ISP, 24, 3),
771 MUX(0, "mout_uart_isp", mout_group2_p, SRC_ISP, 20, 3),
772 MUX(0, "mout_spi0_isp", mout_group2_p, SRC_ISP, 12, 3),
773 MUX(0, "mout_spi1_isp", mout_group2_p, SRC_ISP, 16, 3),
774 MUX(0, "mout_isp_sensor", mout_group2_p, SRC_ISP, 28, 3),
1240 { SRC_TOP5, 0, BIT(0) }, /* MUX mout_user_aclk400_disp1 */
1241 { SRC_TOP5, 0, BIT(24) }, /* MUX mout_user_aclk300_disp1 */
1242 { SRC_TOP3, 0, BIT(8) }, /* MUX mout_user_aclk200_disp1 */
1263 { SRC_TOP5, 0, BIT(28) }, /* MUX mout_user_aclk300_gscl */
1274 { SRC_TOP5, 0, BIT(16) }, /* MUX mout_user_aclk_g3d */
1289 { SRC_TOP4, 0, BIT(28) }, /* MUX mout_user_aclk333 */
1312 { SRC_TOP3, 0, BIT(4) }, /* MUX mout_user_aclk400_mscl */
1326 { SRC_TOP9, 0, BIT(8) }, /* MUX mout_user_mau_epll */