Lines Matching defs:cmu
82 * @cmu: CMU data
89 struct device_node *np, const struct samsung_cmu_info *cmu)
93 if (!cmu->clk_name)
99 parent_clk = clk_get(dev, cmu->clk_name);
104 parent_clk = of_clk_get_by_name(np, cmu->clk_name);
114 const struct samsung_cmu_info *cmu)
119 data->clk_save = samsung_clk_alloc_reg_dump(cmu->clk_regs,
120 cmu->nr_clk_regs);
124 data->nr_clk_save = cmu->nr_clk_regs;
125 data->clk_suspend = cmu->suspend_regs;
126 data->nr_clk_suspend = cmu->nr_suspend_regs;
158 * @cmu: CMU data
162 * 1. Enable parent clock of @cmu CMU
163 * 2. Set initial registers configuration for @cmu CMU clocks
164 * 3. Register @cmu CMU clocks using Samsung clock framework API
167 struct device_node *np, const struct samsung_cmu_info *cmu)
175 err = exynos_arm64_enable_bus_clk(dev, np, cmu);
178 __func__, cmu->clk_name, err);
180 exynos_arm64_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs);
181 samsung_cmu_register_one(np, cmu);
198 const struct samsung_cmu_info *cmu;
205 cmu = of_device_get_match_data(dev);
213 ret = exynos_arm64_cmu_prepare_pm(dev, cmu);
221 ret = exynos_arm64_enable_bus_clk(dev, NULL, cmu);
224 __func__, cmu->clk_name, ret);
227 exynos_arm64_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs);
233 data->ctx = samsung_clk_init(dev, reg_base, cmu->nr_clk_ids);
245 samsung_cmu_register_clocks(data->ctx, cmu);