Lines Matching refs:name
379 * @name: name of this pll clock.
380 * @parent_names: name of the parent clock.
397 const char *name;
417 .name = _name, \
431 const char *name, const char *const *parent_names,
475 struct clk *rockchip_clk_register_cpuclk(const char *name,
481 struct clk *rockchip_clk_register_mmc(const char *name,
491 struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
501 struct clk *rockchip_clk_register_inverter(const char *name,
506 struct clk *rockchip_clk_register_muxgrf(const char *name,
530 const char *name;
555 .name = cname, \
576 .name = cname, \
598 .name = cname, \
616 .name = cname, \
635 .name = cname, \
653 .name = cname, \
672 .name = cname, \
691 .name = cname, \
708 .name = cname, \
726 .name = cname, \
743 .name = cname, \
760 .name = cname, \
775 .name = cname, \
791 .name = cname, \
806 .name = cname, \
821 .name = cname, \
836 .name = cname, \
849 .name = cname, \
860 .name = cname, \
872 .name = cname, \
884 .name = cname, \
900 .name = cname, \
921 .name = cname, \
940 .name = cname, \
957 .name = cname, \
983 unsigned int lookup_id, const char *name,
994 struct clk *rockchip_clk_register_halfdiv(const char *name,