Lines Matching refs:x34
484 D_MODULE(HCLK_ADC, "hclk_adc", CLK_REF_SYNC_D8, RB(0x34, 15),
485 RB(0x34, 16), RB(0x34, 17), RB(0x00, 0),
523 D_MODULE(HCLK_I2C0, "hclk_i2c0", CLK_REF_SYNC_D8, RB(0x34, 9),
524 RB(0x34, 10), RB(0x34, 11), RB(0x00, 0),
526 D_MODULE(HCLK_I2C1, "hclk_i2c1", CLK_REF_SYNC_D8, RB(0x34, 12),
527 RB(0x34, 13), RB(0x34, 14), RB(0x00, 0),
601 D_MODULE(HCLK_UART0, "hclk_uart0", CLK_REF_SYNC_D8, RB(0x34, 0),
602 RB(0x34, 1), RB(0x34, 2), RB(0x00, 0),
604 D_MODULE(HCLK_UART1, "hclk_uart1", CLK_REF_SYNC_D8, RB(0x34, 3),
605 RB(0x34, 4), RB(0x34, 5), RB(0x00, 0),
607 D_MODULE(HCLK_UART2, "hclk_uart2", CLK_REF_SYNC_D8, RB(0x34, 6),
608 RB(0x34, 7), RB(0x34, 8), RB(0x00, 0),
636 .dual.sel = RB(0x34, 30),
649 RB(0x34, 18), RB(0x34, 19), RB(0x34, 20), RB(0x34, 21)),
651 RB(0x34, 22), RB(0x34, 23), RB(0x34, 24), RB(0x34, 25)),
653 RB(0x34, 26), RB(0x34, 27), RB(0x34, 28), RB(0x34, 29)),