Lines Matching defs:source
102 * @source: the ID+1 of the parent clock element.
113 * @sel: select either g1/r1 or g2/r2 as clock source
114 * @g1: 1st source gate (clock enable/disable)
115 * @r1: 1st source reset (module reset)
116 * @g2: 2nd source gate (clock enable/disable)
117 * @r2: 2nd source reset (module reset)
128 uint32_t source:8; /* source index + 1 (0 == none) */
165 .source = 1 + R9A06G032_##_src, \
172 .source = 1 + R9A06G032_##_src, \
187 .source = 1 + R9A06G032_##_src, \
195 .source = 1 + R9A06G032_##_src, \
205 .source = 1 + R9A06G032_##_src, \
634 .source = 1 + R9A06G032_DIV_UART,
643 .source = 1 + R9A06G032_DIV_P2_PG,
1086 * peripherals that have two potential clock source and two gates, one for
1087 * each of the clock source - the used clock source (for all sub clocks)
1327 const char *parent_name = d->source ?
1328 __clk_get_name(clocks->data.clks[d->source - 1]) :