Lines Matching defs:index
101 * @index: the ID of this clock element
127 uint32_t index:8;
128 uint32_t source:8; /* source index + 1 (0 == none) */
164 .index = R9A06G032_##_idx, \
171 .index = R9A06G032_##_idx, \
179 .index = R9A06G032_##_idx, \
186 .index = R9A06G032_##_idx, \
194 .index = R9A06G032_##_idx, \
204 .index = R9A06G032_##_idx, \
631 .index = R9A06G032_UART_GROUP_012,
640 .index = R9A06G032_UART_GROUP_34567,
726 u16 index;
765 int index;
772 index = clkspec.args[0];
773 if (index < R9A06G032_CLOCK_COUNT &&
774 r9a06g032_clocks[index].managed) {
893 g->index = desc->index;
918 u16 index;
1002 if (clk->index == R9A06G032_DIV_UART ||
1003 clk->index == R9A06G032_DIV_P2_PG) {
1065 div->index = desc->index;
1099 u16 index;
1113 static int r9a06g032_clk_mux_set_parent(struct clk_hw *hw, u8 index)
1118 clk_rdesc_set(set->clocks, set->selector, !!index);
1154 g->index = desc->index;
1169 u16 index;
1234 g->index = desc->index;
1355 clocks->data.clks[d->index] = clk;