Lines Matching defs:PWRCL_REG_OFFSET
78 #define PWRCL_REG_OFFSET 0x0
132 .offset = PWRCL_REG_OFFSET,
230 .offset = PWRCL_REG_OFFSET + ALT_PLL_OFFSET,
342 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
384 .reg = PWRCL_REG_OFFSET + MUX_OFFSET,
445 regmap_write(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, 0xc);
451 regmap_update_bits(regmap, PWRCL_REG_OFFSET + MUX_OFFSET,
467 regmap_update_bits(regmap, PWRCL_REG_OFFSET + CLK_CTL_OFFSET,
478 regmap_write(regmap, PWRCL_REG_OFFSET + PSCTL_OFFSET, 0x00030005);
482 regmap_write(regmap, PWRCL_REG_OFFSET + MUX_OFFSET, 0x32);
538 regmap_write(regmap, PWRCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);