Lines Matching defs:regmap
10 #include <linux/regmap.h>
300 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
305 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
344 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,
348 regmap_write(regmap, reg, val);
351 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
356 regmap_write(regmap, PLL_L_VAL(pll), config->l);
357 regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);
358 regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
361 regmap_write(regmap, PLL_CONFIG_CTL_U(pll),
365 regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);
385 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
388 regmap_update_bits(regmap, PLL_TEST_CTL(pll),
392 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
396 regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),
400 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
404 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
414 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
423 ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);
439 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
444 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
455 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
469 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
493 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
509 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
521 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
530 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),
544 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
555 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);
562 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);
620 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
622 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
624 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
626 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
646 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);
649 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,
667 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);
711 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
717 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);
719 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
722 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
727 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
819 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
820 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
823 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);
874 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
877 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);
890 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
896 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
897 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
900 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
903 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
918 struct regmap *regmap)
923 ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);
924 ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);
935 return trion_pll_is_enabled(pll, pll->clkr.regmap);
941 struct regmap *regmap = pll->clkr.regmap;
945 ret = regmap_read(regmap, PLL_MODE(pll), &val);
958 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
965 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
971 return regmap_update_bits(regmap, PLL_MODE(pll),
978 struct regmap *regmap = pll->clkr.regmap;
982 ret = regmap_read(regmap, PLL_MODE(pll), &val);
993 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
998 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
1004 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1005 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1014 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
1015 regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);
1073 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
1120 regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
1141 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1159 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1164 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1165 clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);
1166 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1168 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1170 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1172 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),
1174 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1176 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1182 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
1186 regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,
1189 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,
1192 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1201 struct regmap *regmap = pll->clkr.regmap;
1203 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1215 ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);
1223 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1227 ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1231 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,
1236 ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
1244 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),
1249 return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,
1258 struct regmap *regmap = pll->clkr.regmap;
1260 ret = regmap_read(regmap, PLL_MODE(pll), &val);
1270 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1275 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
1280 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1289 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
1290 regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);
1328 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1329 regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);
1346 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1375 regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);
1416 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1437 struct regmap *regmap = pll->clkr.regmap;
1440 regmap_read(regmap, PLL_USER_CTL(pll), &val);
1470 struct regmap *regmap = pll->clkr.regmap;
1481 return regmap_update_bits(regmap, PLL_USER_CTL(pll),
1512 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1527 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1543 * @regmap: register map
1546 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1553 if (trion_pll_is_enabled(pll, regmap)) {
1558 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1559 regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);
1560 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1561 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1563 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1565 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),
1567 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1569 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),
1571 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),
1573 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1575 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1577 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),
1580 regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,
1584 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1587 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1590 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1605 regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);
1642 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1643 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
1646 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);
1652 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1659 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);
1709 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1712 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1713 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1714 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),
1716 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),
1718 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),
1720 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),
1722 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),
1742 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
1743 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
1767 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1780 ret = trion_pll_is_enabled(pll, pll->clkr.regmap);
1784 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1788 regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);
1795 ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
1800 return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
1809 ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);
1820 ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1825 ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
1830 regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);
1845 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
1875 struct regmap *regmap = pll->clkr.regmap;
1883 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
1905 return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
1942 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
1945 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
1946 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
1947 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
1948 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
1949 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
1950 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
1951 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
1952 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);
1953 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
1954 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
1955 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
1957 regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);
1960 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
1963 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
1966 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1973 struct regmap *regmap = pll->clkr.regmap;
1977 regmap_read(regmap, PLL_MODE(pll), &val);
1988 regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);
1996 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
1999 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2001 regmap_read(regmap, PLL_TEST_CTL(pll), &val);
2012 regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);
2015 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
2023 struct regmap *regmap = pll->clkr.regmap;
2026 regmap_read(regmap, PLL_MODE(pll), &val);
2035 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2038 regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);
2041 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);
2044 regmap_write(regmap, PLL_OPMODE(pll), 0x0);
2063 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2064 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2070 regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);
2095 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2101 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);
2102 clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2103 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2104 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2105 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2106 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2107 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2108 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2109 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2110 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);
2111 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);
2114 regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2117 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2118 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2125 struct regmap *regmap = pll->clkr.regmap;
2129 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2142 ret = trion_pll_is_enabled(pll, regmap);
2150 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);
2155 regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);
2162 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);
2167 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);
2179 struct regmap *regmap = pll->clkr.regmap;
2183 ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);
2194 ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);
2199 ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);
2204 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2207 regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);
2218 regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);
2259 struct regmap *regmap = pll->clkr.regmap;
2262 regmap_read(regmap, PLL_L_VAL(pll), &l);
2264 regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);
2313 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2316 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2317 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);
2318 clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);
2319 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2320 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2321 clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
2322 clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);
2323 clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);
2325 regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);
2327 regmap_update_bits(regmap, PLL_MODE(pll),
2339 regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
2371 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
2376 regmap_write(regmap, PLL_L_VAL(pll), config->l);
2377 regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);
2378 regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);
2381 regmap_write(regmap, PLL_CONFIG_CTL_U(pll),
2385 regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);
2407 regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);
2416 regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);
2417 regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);
2418 regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);
2421 qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);
2447 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2448 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2449 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
2452 regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),
2463 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,
2494 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &pll_mode);
2498 regmap_write(pll->clkr.regmap, PLL_MODE(pll), 0);
2503 regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
2508 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
2509 regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),
2512 regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);
2516 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,
2530 regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,