Lines Matching defs:ma35d1_clk_divider
397 static struct clk_hw *ma35d1_clk_divider(struct device *dev, const char *name,
627 hws[CCAP0_DIV] = ma35d1_clk_divider(dev, "ccap0_div", "ccap0_mux",
633 hws[CCAP1_DIV] = ma35d1_clk_divider(dev, "ccap1_div", "ccap1_mux",
777 hws[UART0_DIV] = ma35d1_clk_divider(dev, "uart0_div", "uart0_mux",
784 hws[UART1_DIV] = ma35d1_clk_divider(dev, "uart1_div", "uart1_mux",
791 hws[UART2_DIV] = ma35d1_clk_divider(dev, "uart2_div", "uart2_mux",
798 hws[UART3_DIV] = ma35d1_clk_divider(dev, "uart3_div", "uart3_mux",
805 hws[UART4_DIV] = ma35d1_clk_divider(dev, "uart4_div", "uart4_mux",
812 hws[UART5_DIV] = ma35d1_clk_divider(dev, "uart5_div", "uart5_mux",
819 hws[UART6_DIV] = ma35d1_clk_divider(dev, "uart6_div", "uart6_mux",
826 hws[UART7_DIV] = ma35d1_clk_divider(dev, "uart7_div", "uart7_mux",
833 hws[UART8_DIV] = ma35d1_clk_divider(dev, "uart8_div", "uart8_mux",
840 hws[UART9_DIV] = ma35d1_clk_divider(dev, "uart9_div", "uart9_mux",
847 hws[UART10_DIV] = ma35d1_clk_divider(dev, "uart10_div", "uart10_mux",
854 hws[UART11_DIV] = ma35d1_clk_divider(dev, "uart11_div", "uart11_mux",
861 hws[UART12_DIV] = ma35d1_clk_divider(dev, "uart12_div", "uart12_mux",
868 hws[UART13_DIV] = ma35d1_clk_divider(dev, "uart13_div", "uart13_mux",
875 hws[UART14_DIV] = ma35d1_clk_divider(dev, "uart14_div", "uart14_mux",
882 hws[UART15_DIV] = ma35d1_clk_divider(dev, "uart15_div", "uart15_mux",
889 hws[UART16_DIV] = ma35d1_clk_divider(dev, "uart16_div", "uart16_mux",
902 hws[KPI_DIV] = ma35d1_clk_divider(dev, "kpi_div", "kpi_mux",
932 hws[SMC0_DIV] = ma35d1_clk_divider(dev, "smc0_div", "smc0_mux",
939 hws[SMC1_DIV] = ma35d1_clk_divider(dev, "smc1_div", "smc1_mux",