Lines Matching defs:pm_cpu
431 struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
434 if (armada_3700_pm_dvfs_is_enabled(pm_cpu->nb_pm_base)) {
435 val = armada_3700_pm_dvfs_get_cpu_parent(pm_cpu->nb_pm_base);
437 val = readl(pm_cpu->reg_mux) >> pm_cpu->shift_mux;
438 val &= pm_cpu->mask_mux;
447 struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
450 if (armada_3700_pm_dvfs_is_enabled(pm_cpu->nb_pm_base))
451 div = armada_3700_pm_dvfs_get_cpu_div(pm_cpu->nb_pm_base);
453 div = get_div(pm_cpu->reg_div, pm_cpu->shift_div);
460 struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
461 struct regmap *base = pm_cpu->nb_pm_base;
508 static void clk_pm_cpu_set_rate_wa(struct clk_pm_cpu *pm_cpu,
527 pm_cpu->l1_expiration = jiffies;
529 pm_cpu->l1_expiration = jiffies + msecs_to_jiffies(20);
544 if (pm_cpu->l1_expiration && time_is_before_eq_jiffies(pm_cpu->l1_expiration))
553 pm_cpu->l1_expiration = 0;
559 struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
560 struct regmap *base = pm_cpu->nb_pm_base;
589 clk_pm_cpu_set_rate_wa(pm_cpu, load_level, rate, base);