clk-of-mmp2.c - OpenGrok cross reference for /kernel/linux/linux-6.6/drivers/clk/mmp/clk-of-mmp2.c

Lines Matching defs:pxa_unit
179 static void mmp2_main_clk_init(struct mmp2_clk_unit *pxa_unit)
182 	struct mmp_clk_unit *unit = &pxa_unit->unit;
187 	if (pxa_unit->model == CLK_MODEL_MMP3) {
189 					pxa_unit->mpmu_base,
193 					pxa_unit->mpmu_base,
202 				pxa_unit->mpmu_base + MPMU_UART_PLL,
209 				pxa_unit->mpmu_base + MPMU_I2S0_PLL,
214 				pxa_unit->mpmu_base + MPMU_I2S1_PLL,
218 	mmp_register_gate_clks(unit, mpmu_gate_clks, pxa_unit->mpmu_base,
283 static void mmp2_apb_periph_clk_init(struct mmp2_clk_unit *pxa_unit)
285 	struct mmp_clk_unit *unit = &pxa_unit->unit;
287 	mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base,
290 	mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base,
293 	if (pxa_unit->model == CLK_MODEL_MMP3) {
294 		mmp_register_gate_clks(unit, mmp3_apbc_gate_clks, pxa_unit->apbc_base,
395 static void mmp2_axi_periph_clk_init(struct mmp2_clk_unit *pxa_unit)
398 	struct mmp_clk_unit *unit = &pxa_unit->unit;
400 	sdh_mix_config.reg_info.reg_clk_ctrl = pxa_unit->apmu_base + APMU_SDH0;
406 	ccic0_mix_config.reg_info.reg_clk_ctrl = pxa_unit->apmu_base + APMU_CCIC0;
413 	ccic1_mix_config.reg_info.reg_clk_ctrl = pxa_unit->apmu_base + APMU_CCIC1;
420 	mmp_register_mux_clks(unit, apmu_mux_clks, pxa_unit->apmu_base,
423 	mmp_register_div_clks(unit, apmu_div_clks, pxa_unit->apmu_base,
426 	mmp_register_gate_clks(unit, apmu_gate_clks, pxa_unit->apmu_base,
429 	if (pxa_unit->model == CLK_MODEL_MMP3) {
430 		mmp_register_mux_clks(unit, mmp3_apmu_mux_clks, pxa_unit->apmu_base,
433 		mmp_register_div_clks(unit, mmp3_apmu_div_clks, pxa_unit->apmu_base,
436 		mmp_register_gate_clks(unit, mmp3_apmu_gate_clks, pxa_unit->apmu_base,
442 					pxa_unit->apmu_base + APMU_GPU,
449 					pxa_unit->apmu_base + APMU_GPU,
453 		mmp_register_gate_clks(unit, mmp2_apmu_gate_clks, pxa_unit->apmu_base,
459 				struct mmp2_clk_unit *pxa_unit)
471 		cells[i].reg = pxa_unit->apbc_base + apbc_gate_clks[i].offset;
481 				struct mmp2_clk_unit *pxa_unit)
483 	if (pxa_unit->model == CLK_MODEL_MMP3) {
484 		pxa_unit->pm_domains[MMP2_POWER_DOMAIN_GPU]
486 				pxa_unit->apmu_base + APMU_GPU,
489 		pxa_unit->pm_domains[MMP2_POWER_DOMAIN_GPU]
491 				pxa_unit->apmu_base + APMU_GPU,
495 	pxa_unit->pd_data.num_domains++;
497 	pxa_unit->pm_domains[MMP2_POWER_DOMAIN_AUDIO]
499 			pxa_unit->apmu_base + APMU_AUDIO,
501 	pxa_unit->pd_data.num_domains++;
503 	if (pxa_unit->model == CLK_MODEL_MMP3) {
504 		pxa_unit->pm_domains[MMP3_POWER_DOMAIN_CAMERA]
506 				pxa_unit->apmu_base + APMU_CAMERA,
508 		pxa_unit->pd_data.num_domains++;
511 	pxa_unit->pd_data.domains = pxa_unit->pm_domains;
512 	of_genpd_add_provider_onecell(np, &pxa_unit->pd_data);
517 	struct mmp2_clk_unit *pxa_unit;
519 	pxa_unit = kzalloc(sizeof(*pxa_unit), GFP_KERNEL);
520 	if (!pxa_unit)
524 		pxa_unit->model = CLK_MODEL_MMP3;
526 		pxa_unit->model = CLK_MODEL_MMP2;
528 	pxa_unit->mpmu_base = of_iomap(np, 0);
529 	if (!pxa_unit->mpmu_base) {
534 	pxa_unit->apmu_base = of_iomap(np, 1);
535 	if (!pxa_unit->apmu_base) {
540 	pxa_unit->apbc_base = of_iomap(np, 2);
541 	if (!pxa_unit->apbc_base) {
546 	mmp2_pm_domain_init(np, pxa_unit);
548 	mmp_clk_init(np, &pxa_unit->unit, NR_CLKS);
550 	mmp2_main_clk_init(pxa_unit);
552 	mmp2_apb_periph_clk_init(pxa_unit);
554 	mmp2_axi_periph_clk_init(pxa_unit);
556 	mmp2_clk_reset_init(np, pxa_unit);
561 	iounmap(pxa_unit->apmu_base);
563 	iounmap(pxa_unit->mpmu_base);
565 	kfree(pxa_unit);