clk-pll.c - OpenGrok cross reference for /kernel/linux/linux-6.6/drivers/clk/mediatek/clk-pll.c

Lines Matching defs:REG_CON0

20 #define REG_CON0		0
231 		r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;
232 		writel(r, pll->base_addr + REG_CON0);
240 		r = readl(pll->base_addr + REG_CON0);
242 		writel(r, pll->base_addr + REG_CON0);
254 		r = readl(pll->base_addr + REG_CON0);
256 		writel(r, pll->base_addr + REG_CON0);
262 		r = readl(pll->base_addr + REG_CON0) & ~pll->data->en_mask;
263 		writel(r, pll->base_addr + REG_CON0);
309 		pll->en_addr = pll->base_addr + REG_CON0;