Lines Matching defs:GATE_PERI0
57 #define GATE_PERI0(_id, _name, _parent, _shift) \
430 GATE_PERI0(CLK_PERI_PWM1_PD, "peri_pwm1_pd", "pwm_qtr_26m", 2),
431 GATE_PERI0(CLK_PERI_PWM2_PD, "peri_pwm2_pd", "pwm_qtr_26m", 3),
432 GATE_PERI0(CLK_PERI_PWM3_PD, "peri_pwm3_pd", "pwm_qtr_26m", 4),
433 GATE_PERI0(CLK_PERI_PWM4_PD, "peri_pwm4_pd", "pwm_qtr_26m", 5),
434 GATE_PERI0(CLK_PERI_PWM5_PD, "peri_pwm5_pd", "pwm_qtr_26m", 6),
435 GATE_PERI0(CLK_PERI_PWM6_PD, "peri_pwm6_pd", "pwm_qtr_26m", 7),
436 GATE_PERI0(CLK_PERI_PWM7_PD, "peri_pwm7_pd", "pwm_qtr_26m", 8),
437 GATE_PERI0(CLK_PERI_PWM_PD, "peri_pwm_pd", "pwm_qtr_26m", 9),
438 GATE_PERI0(CLK_PERI_AP_DMA_PD, "peri_ap_dma_pd", "faxi", 12),
439 GATE_PERI0(CLK_PERI_MSDC30_1_PD, "peri_msdc30_1", "msdc30_1", 14),
440 GATE_PERI0(CLK_PERI_UART0_PD, "peri_uart0_pd", "faxi", 17),
441 GATE_PERI0(CLK_PERI_UART1_PD, "peri_uart1_pd", "faxi", 18),
442 GATE_PERI0(CLK_PERI_UART2_PD, "peri_uart2_pd", "faxi", 19),
443 GATE_PERI0(CLK_PERI_UART3_PD, "peri_uart3_pd", "faxi", 20),
444 GATE_PERI0(CLK_PERI_BTIF_PD, "peri_btif_pd", "faxi", 22),
445 GATE_PERI0(CLK_PERI_I2C0_PD, "peri_i2c0_pd", "faxi", 23),
446 GATE_PERI0(CLK_PERI_SPI0_PD, "peri_spi0_pd", "spi", 28),
447 GATE_PERI0(CLK_PERI_SNFI_PD, "peri_snfi_pd", "sf", 29),
448 GATE_PERI0(CLK_PERI_NFI_PD, "peri_nfi_pd", "faxi", 30),
449 GATE_PERI0(CLK_PERI_NFIECC_PD, "peri_nfiecc_pd", "faxi", 31),